• Journal of Power Electronics
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• 제18권3호
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• pp.923-930
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• 2018

Based on the application of an integrated dynamic brake (IDB) system that uses a PWM inverter fed-AC motor drive to operate the piston, a new active zero state PWM (AZSPWM) is proposed to improve the stability and reliability of the IDB system by suppressing the conducted electro-magnetic interference (EMI) noise under a wide range of load torque. The new AZSPWM reduces common-mode voltage (CMV) by one-third when compared to that of the conventional space vector PWM (CSVPWM). Although this method slightly increases the output current ripple by reducing the CMV, like the CSVPWM, it can be used within the full range of the load torque. Further, unlike other reduced common-mode voltage (RCMV) PWMs, it does not increase the switching power loss. A theoretical analysis is presented and experiments are performed to demonstrate the effectiveness of this method.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.487-488
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• 2016

In this paper, a new active circuit for common-mode voltage (CMV) cancellation in three-level NPC (neutral-point clamped) inverters is proposed, which can avoid the saturation of the common-mode transformer (CMT). The proposed circuit utilizes an additional three-level leg to produce the compensating CMV of the NPC inverters, which eliminates the CMV of the inverter through the CMT.

• Journal of Electrical Engineering and Technology
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• 제13권3호
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• pp.1212-1222
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• 2018

This paper presents a model predictive control (MPC) method to reduce the common-mode voltage (CMV) for inverters connected in parallel, which increase the capacity of energy storage systems (ESSs). The proposed method is based on subdivided voltage vectors, and the resulting algorithm can be applied to control the inverters. Furthermore, we use more voltage vectors than the conventional MPC algorithm; consequently, the quality of grid currents is improved. Several methods were proposed in order to reduce the CMV appearing during operation and its adverse effects. However, those methods have shown to increase the total harmonic distortion of the grid currents. Our method, however, aims to both avoid this drawback and effectively reduce the CMV. By employing phase difference in the carrier signals to control each inverter, we successfully reduced the CMV for inverters connected in parallel, thus outperforming similar methods. In fact, the validity of the proposed method was verified by simulations and experimental results.

• Journal of Power Electronics
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• 제17권3호
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• pp.641-652
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• 2017

This paper proposes a cost-effective topology to drive a three-phase open-end load based on a five-leg indirect matrix converter (IMC) and a space vector modulation (SVM) method. By sharing an inverter leg with two load terminals, the proposed topology can reduce the number of power switches when compared to topologies based on a direct matrix converter or a six-leg IMC. The new SVM method uses only the active vectors that do not produce common-mode voltage (CMV), which results in zero CMV across the load phase and significantly reduces the peak value of the CMV at the load terminal. Furthermore, the proposed drive system can increase the voltage transfer ratio up to 1.5 and provide a superior performance in terms of an output line-to-line voltage with a three-level pulse-width modulation waveform. Simulation and experimental results are given to verify the effectiveness of the proposed topology and the new SVM method.

• 전력전자학회논문지
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• 제26권2호
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• pp.135-140
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• 2021

This study introduces a new pulse width modulation (PWM) method to reduce common-mode voltages (CMVs) and then compares its performance with other reduced CMV-PWM (RCMV-PWM) methods. CMVs should be reduced to ensure the electromagnetic compatibility and safety of grid-connected inverters. RCMV-PWM methods attempt to synthesize voltage references without zero vectors, which cause high CMV peaks. In these methods, the peak-to-peak magnitude of CMVs can be reduced by one-third of the conventional space-vector PWM. The introduced method splits every reference vector into two vectors to avoid the use of zero vectors. The performances of the RCMV-PWM methods are analyzed in accordance with the modulation index through simulation and experiment.

• Journal of Power Electronics
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• 제18권5호
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• pp.1458-1469
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• 2018

This paper proposes a novel common-mode voltage (CMV) elimination (CMV-EL) method based on model predictive control (MPC) to eliminate CMV for three-level T-type inverters (3LT2Is). In the proposed MPC method, only six medium and one zero voltage vectors (VVs) (6MV1Z) that generate zero CMV are considered as candidates to perform the MPC. Moreover, the influence of dead-time effects on the CMV of the MPC-based 6MV1Z method is investigated, and the candidate VVs are redesigned by pre-excluding the VVs that will cause CMV fluctuations during the dead time from 6MV1Z. Only three or five VVs are included to perform optimization in every control period, which can significantly reduce the computational complexity. Thus, a small control period can be implemented in the practical applications to achieve improved grid current performance. With the proposed CMV-EL method, the CMV of the $3LT^2Is$ can be effectively eliminated. In addition, the proposed CMV-EL method can balance the neutral point potentials (NPPs) and yield satisfactory performance for grid current tracking in steady and dynamic states. Simulation and experimental results are presented to verify the effectiveness of the proposed method.

• Journal of Power Electronics
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• 제16권6호
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• pp.2076-2084
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• 2016

In this paper, a novel scheme to eliminate common-mode voltage (CMV) is proposed for three-level neutral-point clamped (NPC) inverters. In the proposed scheme, a low-power full-bridge converter is utilized to produce compensatory voltage for CMV, which is injected into an NPC inverter through a single-phase four-winding transformer. With the proposed circuit, the power range for applications is not limited, and the maximum modulation index of the inverter is not reduced. These features are suitable for high-power medium-voltage machine drives. The effectiveness of the proposed method is verified by simulation and experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.383-384
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• 2015

This paper presents a new space vector modulation (SVM) method for indirect matrix converters (IMCs) to reduce commonmode voltage as well as minimize output current ripple in a high voltage transfer ratio. In the proposed SVM, the three-vector modulation scheme is used in the rectifier stage, while the nonzero state modulation technique, where the three nearest active vectors are selected to synthesize the desired output voltage, is applied to inverter stage to reduce the CMV. The proposed SVM method can significantly reduce the output current ripple and common-mode voltage of the IMC without any extra hardware. Simulated results are provided to demonstrate the effectiveness of the proposed SVM method.

• Journal of Power Electronics
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• 제16권3호
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• pp.936-945
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• 2016

Large magnitude common-mode voltage (CMV) and its variation dv/dt have an adverse effect on motor drives that leads to early winding failure and bearing deterioration. For matrix converters, the switch states that connect each output line to a different input phase result in the lowest CMV among all of the valid switch states. To reduce the output CMV for matrix converters, this paper presents a new space vector modulation (SVM) strategy by utilizing these switch states. By this mean, the peak value and the root mean square of the CMV are dramatically decreased. In comparison with the conventional SVM methods this strategy has a similar computation overhead. Experiment results are shown to validate the effectiveness of the proposed modulation method.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2020년도 전력전자학술대회
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• pp.106-108
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• 2020

This paper introduces a new pulse-width modulation (PWM) method to reduce common-mode voltages (CMVs) and compare its performance with other reduced CMV-PWM (RCMV-PWM) methods. To avoid the use of zero-vectors which cause high CMV peaks, the introduced method splits every reference vector into two vectors such that the peak-to-peak magnitude of CMV is reduced by one-third of conventional space-vector PWM (SVPWM). The performance of RCMV-PWMs altered by the modulation index are analyzed with simulation results.