• 제목/요약/키워드: Common-mode

검색결과 854건 처리시간 0.029초

Common-mode Voltage Reduction for Inverters Connected in Parallel Using an MPC Method with Subdivided Voltage Vectors

  • Park, Joon Young;Sin, Jiook;Bak, Yeongsu;Park, Sung-Min;Lee, Kyo-Beum
    • Journal of Electrical Engineering and Technology
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    • 제13권3호
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    • pp.1212-1222
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    • 2018
  • This paper presents a model predictive control (MPC) method to reduce the common-mode voltage (CMV) for inverters connected in parallel, which increase the capacity of energy storage systems (ESSs). The proposed method is based on subdivided voltage vectors, and the resulting algorithm can be applied to control the inverters. Furthermore, we use more voltage vectors than the conventional MPC algorithm; consequently, the quality of grid currents is improved. Several methods were proposed in order to reduce the CMV appearing during operation and its adverse effects. However, those methods have shown to increase the total harmonic distortion of the grid currents. Our method, however, aims to both avoid this drawback and effectively reduce the CMV. By employing phase difference in the carrier signals to control each inverter, we successfully reduced the CMV for inverters connected in parallel, thus outperforming similar methods. In fact, the validity of the proposed method was verified by simulations and experimental results.

권선 방식에 의한 공통 모드 초크의 특성해석에 관한 연구 (A Study on Characteristics Analysis of Winding Method for Common-Mode Choke)

  • 원재선;김희승;김종해
    • 전력전자학회논문지
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    • 제19권1호
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    • pp.8-14
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    • 2014
  • This paper presents the intra capacitance modeling according to the winding method and section bobbin for CM choke capable of the EMI attenuation of broad bands from lower frequency bands to higher frequency bands and high frequency type common-mode choke capable of the EMI attenuation of high frequency band used in the EMI Block of LED-TV SMPS. In case of high frequency type CM choke, it can be explained the parasitic capacitance of A type and section bobbin type winding methods among them is much smaller than the other. The first resonant frequency of the proposed CM choke tends to increase as the parasitic capacitance becomes small and its impedance characteristics also show improved performance as the first resonant frequency increases. In the future, the CM chokes of high frequency type show it can be practically used in not only LED/LCD-TV SMPS but also several applications such as LED Lighting, Adapter and so on.

A New SVM Method to Reduce Common-Mode Voltage of Five-leg Indirect Matrix Converter Fed Open-End Load Drives

  • Tran, Quoc-Hoan;Lee, Hong-Hee
    • Journal of Power Electronics
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    • 제17권3호
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    • pp.641-652
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    • 2017
  • This paper proposes a cost-effective topology to drive a three-phase open-end load based on a five-leg indirect matrix converter (IMC) and a space vector modulation (SVM) method. By sharing an inverter leg with two load terminals, the proposed topology can reduce the number of power switches when compared to topologies based on a direct matrix converter or a six-leg IMC. The new SVM method uses only the active vectors that do not produce common-mode voltage (CMV), which results in zero CMV across the load phase and significantly reduces the peak value of the CMV at the load terminal. Furthermore, the proposed drive system can increase the voltage transfer ratio up to 1.5 and provide a superior performance in terms of an output line-to-line voltage with a three-level pulse-width modulation waveform. Simulation and experimental results are given to verify the effectiveness of the proposed topology and the new SVM method.

New Generalized PWM Schemes for Multilevel Inverters Providing Zero Common-Mode Voltage and Low Current Distortion

  • Nguyen, Nho-Van;Nguyen, Tam-Khanh Tu
    • Journal of Power Electronics
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    • 제19권4호
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    • pp.907-921
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    • 2019
  • This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

전류 모드 다 입력 MAX회로에서 트랜스컨덕턴스 조정에 의한 고주파 왜곡 억제 (Suppression of High Frequency Distortion in the Multiple-Input Current-Mode MAX Circuits by Adjustment of Transconductance)

  • 이준수;손홍락;김형석
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.1053-1056
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    • 2003
  • A distortion suppression technology for employing multiple inputs in 3n+1 type current mode Max circuit is proposed using the adjustment of transconductance. If the number of inputs in current mode Max circuit increases, the high frequency distortion in the output signal grows. In this paper, it has been disclosed that the distortion in the multiple input Max circuit is proportional to sum of parasitic capacitance in input terminals, to the derivative of the output signal and also to the inverse of transconductance of the common diode-connected transistor. The proposed idea is by employing as larger transconductance of the common diode-connected transistor as possible. The effectiveness of the proposed idea has been proved through the HSPICE simulation.

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보조전극을 가진 AC-PDP cell구조의 방전특성 연구 (A Study of the Discharge Characteristics of AC-PDP Having Auxiliary Electrodes)

  • 강경일;장진호;최준영;김동현;이호준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 Techno-Fair 및 추계학술대회 논문집 전기물성,응용부문
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    • pp.173-174
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    • 2007
  • 본 논문에서는 scan 전극과 common 전극 사이에 보조 전극을 가진 PDP에서 asymmetry, long gap mode 와 같은 새로운 구동방법을 제안한다. asymmetry mode에서 주전극의 가운데 부분에 위치한 보조전극은 리셋, 어드레스, 서스테인의 모든 구간동안 scan 또는 common 전극에 연결되어 있다. long gap mode에서는 전기적으로 끊어져있거나 초기 몇 개의 서스테인 펄스를 제외하고 서스테인 구간동안 Vs/2의 전압으로 유지된다. 제안된 조와 구동 방법에서 전력에너지소비를 최소화함으로써 더 높은 발광효율을 얻을 수 있다. 새로운 구동방법의 효용은 다양한 Xe분압상태에서도 연구되었다.

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생체 전위 측정에서 2-전극 차동 증폭 시스템과 2-전극 비차동 증폭 시스템의 비교 (Comparison between a differential and a non-differential amplifier system with two electrodes in bio-potential measurement)

  • 강대훈;이충근;이상준;이명호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 제39회 하계학술대회
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    • pp.1977-1978
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    • 2008
  • In this paper, we compare performance of common-mode rejection between a differential and a non-differential amplifier system with two electrodes. A differential amplifier system is constant for common-mode rejection ratio(CMRR) on the frequency domain. But a non-differential amplifier's CMRR is determined by $Z_{FB}/Z_e$ ($Z_{FB}$ ; feedback impedance, $Z_e$; electrode impedance). There is trade-off between a non-differential amplifier's CMRR and its differential input impedance. And a non-differential amplifier system has some advantages for a bio-potential measurement with two electrodes because a designer can control the impedance between the body and system's common.

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Mode Analysis of Cascaded Four-Conductor Lines Using Extended Mixed-Mode S-Parameters

  • Zhang, Nan;Nah, Wansoo
    • Journal of electromagnetic engineering and science
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    • 제16권1호
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    • pp.57-65
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    • 2016
  • In this paper, based on the mode analysis of four-conductor lines, the extended mixed-mode chain-parameters and S-parameters of four-conductor lines are estimated using current division factors. The extended mixed-mode chain-parameters of cascaded four-conductor lines are then obtained with mode conversion. And, the extended mixed-mode S-parameters of cascaded four-conductor lines can be predicted from the transformation of the extended chain-parameters. Compared to the extended mixed-mode S-parameters of four-conductor lines, the cross-mode S-parameters are induced in the extended mixed-mode S-parameters of cascaded four-conductor lines, due to the imbalanced current division factors of cascaded two sections. The generated cross-mode S-parameters make the equivalent different- and common-mode conductors not independent from each other again. In addition, a new mode conversion, which applies the imbalanced current division factors, between the extended mixed-mode S-parameters and standard S-parameters is also proposed in this paper. Finally, the validity of the proposed extended mixed-mode S-parameters and mode conversion is confirmed by a comparison of the simulated and estimated results of shielded cable.

혼합제어모드를 이용한 텔레오퍼레이션 작업용 지능형 매스터 컨트롤러 (An intelligent master controller with mixed mode for teleoperation)

  • 이영우;권동수
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1996년도 한국자동제어학술회의논문집(국내학술편); 포항공과대학교, 포항; 24-26 Oct. 1996
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    • pp.461-465
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    • 1996
  • Position and rate control modes arc the two common modes for controlling remote manipulators with joysticks or hand controllers. Generally, position mode is easier for teleoperation than rate modes, when the manipulation work space is small or comparable to the human operator's control space. When the telemanipulator's work space is very large, human operator's control motion range must be large to allow telemanipulator's full range of motion resulting poor control resolution. One way to solve the poor resolution problem is to use indexing. However, rate mode can provide any higher degree of resolution without use of indexing. If two modes are mixed, master controller will be more convenient. The mixed mode algorithm, changes operating mode from position mode to rate mode or vise versa using fuzzy logic. The fuzzy logic algorithm, which has been designed to recognize the teleoperator's intended motion properly, provides an intelligence to a master controller.

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Balanced Buck-Boost Switching Converter to Reduce Commom-mode Conducted Noise

  • Shoyama, Masahito;Ohba, Masashi;Ninomiya, Tamotsu
    • Journal of Power Electronics
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    • 제2권2호
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    • pp.139-145
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    • 2002
  • Because conventional switching converters have been usually using unbalanced circuit topologies, parasitice between the drain/collertor of an active switch and frame ground through its heat sink may generate the commom-mode conducted noise. We have proposed a balanced switching converter circuit, whitch is an effective way to reduce the commom-mode converter version of the balanced switching converter was presented and the mechanism of the commom-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switch converter circuit and presents a buck-boost converter version of the blanced switching converter. The feature of common-mode niose reduction is confirmed by experimental resuits and the mechanisem of the commom-mode niose reduction is explained using equivalent circuits.