• Journal of Convergence Society for SMB
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• v.2 no.1
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• pp.33-40
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• 2012

Recently, embedded environment suffers a huge change, by growth of hardware and turning to be software-controlled. This has improved embedded software complexity. It also brought us the limit of the old development way to resolve the problem. Model-driven development is one solution to solve the limit common software development by previous way, and it became a one uses for embedded environment also. In this paper, we propose model based development approach for embedded software, witch consists of diagram editor and automatic code generator. The diagram editors are implemented by GMF, which include additional functions to solve memory restrictions and concurrent execution problems without OS environment to a automatic code generator. In order to verify the generated code, it will be tested in main control model of UAV by replacing existing module with generated one.

• International Journal of Reliability and Applications
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• v.7 no.1
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• pp.27-39
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• 2006

Many real world cases in material failure analysis do not follow perfectly the normal distribution. Forcing of the normality assumption may lead to inaccurate predictions and poor product quality. We examine the failure process of the internal bond (IB or tensile strength) of medium density fiberboard (MDF). We propose a forced censoring technique that closer fits the lower tails of strength distributions and better estimates extremely smaller percentiles, which may be valuable to continuous quality improvement initiatives. Further analyses are performed to build an accelerated common-shaped Weibull model for different product types using the $JMP^{(R)}$ Survival and Reliability platform. In this paper, a forced censoring technique is implemented for the first time as a software module, using $JMP^{(R)}$ Scripting Language (JSL) to expedite data processing, which is crucial for real-time manufacturing settings. Also, we use JSL to automate the task of fitting an accelerated Weibull model and testing model homogeneity in the shape parameter. Finally, a package script is written to readily provide field engineers customized reporting for model visualization, parameter estimation, and percentile forecasting. Our approach may be more accurate for product conformance evaluation, plus help reduce the cost of destructive testing and data management due to reduced frequency of testing. It may also be valuable for preventing field failure and improved product safety even when destructive testing is not reduced by yielding higher precision intervals at the same confidence level.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.728-731
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• 2015

Nowadays, the majority of the manufacturing plant equipment tend to be transformed with automation system than traditional manual equipment. Production manager to make the process decision-making, not accustomed to manage and take advantage of professional decision-making technique. So rather than using the system proposed, it is common to undergo sporadic measures through the external intermediary. In this paper, whether possible delivery to match the delivery through the issue and decision-making system of the data input to be generated in the manufacturing process, review the supply information of the material used in the process, a plurality of input / output device We have proposed an input module that utilizes the Android Application and ATmega2560. As a result, easily cope with the improvement and change of process information of the work efficiency of the production business of the manufacturing process, and reduced plant data missing tasks, and management improvement to the improvement of the delivery compliance and product satisfaction by improving productivity we try to contribute to.

• Journal of the Korea Institute of Building Construction
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• v.14 no.6
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• pp.623-629
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• 2014

The purpose of this study is to analyze user requirements of photovoltaic generating facilities for detached houses. For the analysis, 202 households that installed photovoltaic generating facilities to conduct a survey. According to the survey results, users mainly demanded 'Reduction in self-burden amount' and 'Maintenance Services.' In addition, when conducting 'Education for photovoltaic generating facilities', they highly wanted to participated in it. Results on the installation status of photovoltaic generating facilities are as follows: Of locations where photovoltaic generating facilities are installed, the most households installed them on the roof, 54%. As for the angle in which photovoltaic module is installed, the range of $25{\sim}35^{\circ}$ was the most common and in the case of installation direction, southern exposure accounted for the rate of 93%. The monthly average generation of households surveyed is approximately 320kWh. Research on technology and policy to address user requirements shown in this study is deemed necessary in the future.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.4
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• pp.102-110
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• 2009

In this paper, we propose an object detection method for real-time in infrared (IR) images and PowerPC (PPC) and H/W design based on field programmable gate array (FPGA). An open H/W architecture has the advantages, such as easy transplantation of HW and S/W, support of compatibility and scalability for specification of current and previous versions, common module design using standardized design, and convenience of management and maintenance. Proposed background modeling for an open H/W architecture design decreases size of search area to construct a sparse block template of search area in IR images. We also apply to compensate for motion compensation when image moves in previous and current frames of IR sensor. Separation method of background and objects apply to adaptive values through time analysis of pixel intensity. Method of clutter reduction to appear near separated objects applies to median filter. Methods of background modeling, object detection, median filter, labeling, merge in the design embedded system execute in PFC processor. Based on experimental results, proposed method showed real-time object detection through global motion compensation and background modeling in the proposed embedded system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.4
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• pp.32-38
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• 2011

This paper describes implementation of the 5.0GHz RF frequency synthesizer with 0.18${\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma}-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get excellent performance of high speed and wide tuning range, N-P MOS core structure and 12 step cap banks have been used in design of the VCO. The chip area including pads for testing is $1.1{\times}0.7mm^2$, and the chip area only core for IP in SoC is $1.0{\times}0.4mm^2$. Through analysing of the fabricated frequency synthesizer, we can see that it has wide operation range and excellent frequency characteristics.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.57-63
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• 2016

This paper describes implementation of the RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4g SUN sensor node transceiver modules. Design of the each module like VCO, prescaler, 1/N divider, ${\Delta}-{\Sigma}$ modulator, and common circuits of the PLL has been optimized to obtain high speed and low noise performance. Especially, the VCO has been designed with NP core structure and 13 steps cap-bank to get high speed, low noise, and wide band tuning range. The output frequencies of the implemented synthesizer is 1483MHz~2017MHz, the phase noise of the synthesizer is -98.63dBc/Hz at 100KHz offset and -122.05dBc/Hz at 1MHz offset.

• Journal of Broadcast Engineering
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• v.17 no.6
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• pp.1091-1105
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• 2012

In this paper, we analyzed statistical characteristics and complexity of HEVC encoder as a leading research of acceleration, optimization and parallelization. Computational complexity of the HEVC encoder is approximately twice the compression performance compared to H.264/AVC. But, the increase of encoder complexity remains a problem to be solved in the future. Before performing the research on acceleration, optimization and parallelization to reduce high complexity of HEVC encoder, we measure the complexity each module for HEVC encoder using it's reference software HM 7.1. We also measured the predicted complexity of fast HEVC encoder software, used in real applications, using HM 7.1 applying fast encoding method. The complexity is measured in terms of the operating cycle of the encoder software under the common test sequences and conditions in the Windows PC environment. In addition, we analyze statistical characteristics of HEVC encoder software according to encoding structures and limitation using coded bitstreams.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.2
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• pp.163-168
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• 2018

In this paper, we propose and develop a test automation program tool that automates GUI based testing using black box testing technique in Windows environment. The main features of the proposed test automation program tool are as follows. First, an error condition is designated as an image, a screen is captured for each test step, and an error message is detected through comparison of image similarity. Second, the proposed system supports various setting options such as event waiting time during execution and coordinate increment value between each test step. Such black box test automation research was common in environments such as Android and Web, but not in Windows environment. The results of performance evaluation show that the proposed system performs GUI test automation as an image comparison module and confirms that the test is performed normally by confirming process status and error image detection.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.4
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• pp.10-21
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• 2003

Recently, the optical subscriber interface module uses the high performance network processor to quickly develop new application services such as MPLS, VPN, RPR and EPON with a short time-to-market. Although a number of vendors are developing the network processor at 2.5Gbps, only the IBM NP4GS3 can provide packet processing with wire-speed at 2.5Gbps. IBM NP4GS3, however, uses its unique speed DASL interface instead of CSIX-Ll interface, which has standardized by M: Forum currently Therefore, we implement an interconnection mechanism to use the switch fabric with CSIX-Ll interface. In this paper, we suggest the architecture and a packet control mechanism supporting interconnection between IBM NP4GS3 DASL and CSIX-Ll switch interface using the common IBM UDASL ASIC and XILINX FPGA.