• Title/Summary/Keyword: Coder

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JPEG-2000 Gradient-Based Coding: An Application To Object Detection

  • Lee, Dae Yeol;Pinto, Guilherme O.;Hemami, Sheila S.
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2013.11a
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    • pp.165-168
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    • 2013
  • Image distortions, such as quantization errors, can have a severe negative impact on the performance of computer vision algorithms, and, more specifically, on object detection algorithms. State-of-the-art implementations of the JPEG-2000 image coder commonly allocate the available bits to minimize the Mean-Squared-Error (MSE) distortion between the original image and the resulting compressed image. However, considering that some state-of-the-art object detection methods use the gradient information as the main image feature, an improved object detection performance is expected for JPEG-2000 image coders that allocate the available bits to minimize the distortions on the gradient content. Accordingly, in this work, the Gradient Mean-Squared-Error (GMSE) based JPEG-2000 coder presents an improved object detection performance over the MSE based JPEG-2000 image coder when the object of interest is located at the same spatial location of the image regions with the strongest gradients and also for high bit-rates. For low bit-rates (e.g. 0.07bpp), the GMSE based JPEG-2000 image coder becomes overly selective in choosing the gradients to preserve, and, as a result, there is a greater chance of mismatch between the spatial locations of the gradients that the coder is trying to preserve and the spatial locations of the objects of interest.

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A Co-design Method for JPEG2000 Video Compression System in Telemetry using DSP and FPGA (DSP와 FPGA의 Co-design을 이용한 원격측정용 임베디드 JPEG2000 시스템구현)

  • Yu, Jae-Taeg;Hyun, Myung-Han;Nam, Ju-Hun
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.39 no.9
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    • pp.896-903
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    • 2011
  • In this paper, a co-design method for JPEG2000 video compression system using DSP and FPGA is presented. By profiling the complexity of JPEG2000 algorithm, it is noticed that a MQ-coder is the most complex part. Thus, we implement the MQ-coder on FPGA for the parallel processing using VHDL to reduce the complexity. In order to verify the performance of the MQ-coder, JBIG2 standard test vector and images are used. The experimental results show that the proposed MQ-coder enhances the processing time approximately 3 times compared with the previous software MQ-coder.

Real-time Implementation of CS-ACELP Speech Coder for IMT-2000 Test-bed (IMT-2000 Test-bed 상에서 CS-ACELP 음성부호화기 실시간 구현)

  • 김형중;최송인;김재원;윤병식
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.2 no.3
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    • pp.335-341
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    • 1998
  • In this paper, we present a real time implementation of CS-ACELP(Conjugate Structure Algebraic Code Excited Linear Prediction) speech coder. ITU-T has standardized the CS-ACELP algorithm as G.729. Areal-time implementation of CS-ACELP speech coder algorithm is achieved using 16 bit fixed-point DSP chip. To implement in fixed-point DSP Chip, integer simulation of CS-ACELP algorithm is used. Furthermore. input/output function and communication function included in CS-ACELP speech coder is described. We develope CS-ACELP speech coder in DSP evaluation board and evaluate in IMT-2000 Test-bed.

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Multiple Description Embedded Zerotree Wavelet Coding Using Threshold Separation (문턱값 분리를 이용한 다중 기술 엠베디드 제로트리 웨이블릿 압축)

  • 엄일규
    • Proceedings of the IEEK Conference
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    • 2000.06d
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    • pp.19-22
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    • 2000
  • In this paper, we present a new multiple description embedded zerotree wavelet coding method using the two splitted thresholds. We first model a half EZW coder and then we present multiple description coder which has two coding channels using wide threshold EZW(WTEZW) coders. To evaluate the performance of the proposed coder, we provide an image coding applications with two descriptions and compare MDC image coding results reported to date.

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Unequal Error Protection using IP-SCCC and DCT-based Embedded Coder for Image Transmission (IP-SCCC와 EZ-DCT를 이용한 영상전송의 UEP 채널 부호화 방법)

  • 이연문;조경식;정차근
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.173-176
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    • 2000
  • The fact that the channel coding methode with property of the source coder is better than using the channel characteristics is well known. In this paper We propose the UEP channel coding scheme using IP-SCCC and DCT-based embedded coder for image transmission. Moreover, to evaluate the effectiveness of the proposed scheme some simulation results are presented, in which the channel models of additive white Gaussian noise and Rayleigh fading are assumed.

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A Study Of Implementing MQ CODER In JPEG2000 On FPGA (JPEG2000 MQ CODER의 FPGA 구현에 대한 연구)

  • 정규철;고광철;정재명
    • Proceedings of the IEEK Conference
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    • 2003.07e
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    • pp.2267-2270
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    • 2003
  • This paper has been studied to implement MQ encoder in JPEG2000 on FPGA. In the JPEG2000 architecture, Each of coding passes collects contextual information about the bit-plane data. An MQ coder uses contextual information and its internal state to decode a compressed bit-stream. This paper draws up JPEG2000 Standard Part 1: FCD 15444-1 It is simulated with Modelsim and tested with JBIG2 data.

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Implementation of the ACELP/MPMLQ-Based Dual-Rate Voice Coder Using DSP (ACELP/MP-MLQ에 기초한 dual-rate 음성 코더의 DSP 구현)

  • Lee Jae-Sik;Son Yong-Ki;Jeon Il;Chang Tae-Gyu;Min Byoung-Ki
    • Proceedings of the Acoustical Society of Korea Conference
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    • spring
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    • pp.51-54
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    • 2000
  • This paper describes the fixed-point DSP implementation of a CELP(code-excited linear prediction)-based speech coder. The effective realization methodologies to maximize the utilization of the DSP's architectural features, specifically Parallel movement and pipelining are also presented together with the implementation results targeted for the ITU-T standard G.723.1 using Motorola DSP56309. The operation of the implemented speech coder is verified using the test vectors offered by the standard as well as using the peripheral interface circuits designed for the coder's real-time operation.

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A Low Bit Rate Speech Coder Based on the Inflection Point Detection

  • Iem, Byeong-Gwan
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.15 no.4
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    • pp.300-304
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    • 2015
  • A low bit rate speech coder based on the non-uniform sampling technique is proposed. The non-uniform sampling technique is based on the detection of inflection points (IP). A speech block is processed by the IP detector, and the detected IP pattern is compared with entries of the IP database. The address of the closest member of the database is transmitted with the energy of the speech block. In the receiver, the decoder reconstructs the speech block using the received address and the energy information of the block. As results, the coder shows fixed data rate contrary to the existing speech coders based on the non-uniform sampling. Through computer simulation, the usefulness of the proposed technique is shown. The SNR performance of the proposed method is approximately 5.27 dB with the data rate of 1.5 kbps.

Multi Mode Harmonic Transform Coding for Speech and Music

  • Kim, Jonghark;Shin, Jae-Hyun;Lee, Insung
    • The Journal of the Acoustical Society of Korea
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    • v.22 no.3E
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    • pp.101-109
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    • 2003
  • A multi-mode harmonic transform coding (MMHTC) for speech and music signals is proposed. Its structure is organized as a linear prediction model with an input of harmonic and transform-based excitation. The proposed coder also utilizes harmonic prediction and an improved quantizer of excitation signal. To efficiently quantize the excitation of music signals, the modulated lapped transform(MLT) is introduced. In other words, the coder combines both the time domain (linear prediction) and the frequency domain technique to achieve the best perceptual quality. The proposed coder showed better speech quality than that of the 8 kbps QCELP coder at a bit-rate of 4 kbps.

Real-time Implementation of G.723.1A Speech Coder Using a TMS320VC5402 DSP (TMS320VC5402 DSP를 이용한 G.723.1A 음성부호화기의 실시간 구현)

  • Lee, Song-Chan;Chung, Ik-Joo
    • Speech Sciences
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    • v.10 no.2
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    • pp.65-75
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    • 2003
  • This paper describes the issues associated with the real-time implementation of G.723.1A dual-rate speech coder on a TMS320VC5402 DSP. Firstly, the main features of the G.723.1A speech coder and the procedure involved in the implementation using assembly and C languages are discussed. Various real-time implementation issues such as memory/MIPS tradeoffs are also presented. For fixed-point implementation, we converted the ITU-T fixed-point ANSI C code into TMS320VC5402 code in the bit-exact way through verification using the test vectors. Finally, as the result of implementation, we present the MIPS and memory requirement for the real-time operation.

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