• Title/Summary/Keyword: Code Point

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Fractal Deformation using Code and Displacement Vectors (코드와 변위 벡터를 이용한 프랙탈 변형)

  • Han, Yeong-Deok;Kim, Gi-Ok
    • The Journal of the Korea Contents Association
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    • v.7 no.12
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    • pp.322-332
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    • 2007
  • We consider a deformation method suitable for fractal. In IFS fractal, the position of a point is characterized by its code as well as by its coordinates. Code has a meaning of address for fractal. If we move a point by changing its code, the resulting movement shows fractal behavior. We propose three deformation methods based on code information. For the deformation vector of a point in fractal, 1) we use the vector of a given vector field at the point obtained by code transformation, 2) we use the vector constructed by adding predefined displacement vectors according to the code information of the point. Both methods show a fractal-like character as well as an ordinary continuous deformation character. Also, 3) we can deform fern-fractal more naturally by restricting its deforming region using code form.

A Rule-based Optimal Placement of Scaling Shifts in Floating-point to Fixed-point Conversion for a Fixed-point Processor

  • Park, Sang-Hyun;Cho, Doo-San;Kim, Tae-Song;Paek, Yun-Heung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.4
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    • pp.234-239
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    • 2006
  • In the past decade, several tools have been developed to automate the floating-point to fixed-point conversion for DSP systems. In the conversion process, a number of scaling shifts are introduced, and they inevitably alter the original code sequence. Recently, we have observed that a compiler can often be adversely affected by this alteration, and consequently fails to generate efficient machine code for its target processor. In this paper, we present an optimization technique that safely migrates scaling shifts to other places within the code so that the compiler can produce better-quality code. We consider our technique to be safe in that it does not introduce new overflows, yet preserving the original SQNR. The experiments on a commercial fixed-point DSP processor exhibit that our technique is effective enough to achieve tangible improvement on code size and speed for a set of benchmarks.

A GPU-based point kernel gamma dose rate computing code for virtual simulation in radiation-controlled area

  • Zhihui Xu;Mengkun Li;Bowen Zou;Ming Yang
    • Nuclear Engineering and Technology
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    • v.55 no.6
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    • pp.1966-1973
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    • 2023
  • Virtual reality technology has been widely used in the field of nuclear and radiation safety, dose rate computing in virtual environment is essential for optimizing radiation protection and planning the work in radioactive-controlled area. Because the CPU-based gamma dose rate computing takes up a large amount of time and computing power for voxelization of volumetric radioactive source, it is inefficient and limited in its applied scope. This study is to develop an efficient gamma dose rate computing code and apply into fast virtual simulation. To improve the computing efficiency of the point kernel algorithm in the reference (Li et al., 2020), we design a GPU-based computing framework for taking full advantage of computing power of virtual engine, propose a novel voxelization algorithm of volumetric radioactive source. According to the framework, we develop the GPPK(GPU-based point kernel gamma dose rate computing) code using GPU programming, to realize the fast dose rate computing in virtual world. The test results show that the GPPK code is play and plug for different scenarios of virtual simulation, has a better performance than CPU-based gamma dose rate computing code, especially on the voxelization of three-dimensional (3D) model. The accuracy of dose rates from the proposed method is in the acceptable range.

A Fixed-point Digital Signal Processor Development System Employing an Automatic Scaling (자동 스케일링 기능이 지원되는 고정 소수집 디지털 시그날 프로세서 개발 시스템)

  • 김시현;성원용
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.3
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    • pp.96-105
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    • 1992
  • The use of fixed-point digital signal processors, such as the TMS 320C25, requires scaling of data at each arithmetic step to prevent overflows while keeping the accuracy. A software which automatizes this process is developed for TMS 320C25. The programmers use a model of a hypothetical floating-point digital signal processor and a floating-point format for data representation. However, the program and data are automatically translated to a fixed-point version by this software. Thus, the execution speed is not sacrificed. A fixed-point variable has a unique binary-point location, which is dependent on the range of the variable. The range is estimated from the floating-point simulation. The number of shifts needed for arithmetic or data transfer step is determined by the binary-points of the variables associated with the operation. A fixed-point code generator is also developed by using the proposed automatic scaling software. This code generator produces floating-point assembly programs from the specifiations of FIR, IIR, and adaptive transversal filters, then floating-point programs are transformed to fixed-point versions by the automatic scaling software.

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High-Speed Korean Address Searching System for Efficient Delivery Point Code Generation (효율적인 순로코드 발생을 위한 고속 한글 주소검색 시스템 개발)

  • Kim, Gyeong-Hwan;Lee, Seok-Goo;Shin, Mi-Young;Nam, Yun-Seok
    • The KIPS Transactions:PartD
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    • v.8D no.3
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    • pp.273-284
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    • 2001
  • A systematic approach for interpreting Korean addresses based on postal code is presented in this paper. The implementation is focused on producing the final delivery point code from various types of address recognized. There are two stages in the address interpretation : 1) agreement verification between the recognized postal code and upper part of the address and 2) analysis of lower part of the address. In the agreement verification procedure, the recognized postal code is used as the key to the address dictionary and each of the retrieved addresses is compared with the words in the recognized address. As the result, the boundary between the upper part and the lower part is located. The confusion matrix, which is introduced to correct possible mis-recognized characters, is applied to improve the performance of the process. In the procedure for interpreting the lower part address, a delivery code is assigned using the house number and/or the building name. Several rules for the interpretation have been developed based on the real addresses collected. Experiments have been performed to evaluate the proposed approach using addresses collected from Kwangju and Pusan areas.

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A Novel Hitting Frequency Point Collision Avoidance Method for Wireless Dual-Channel Networks

  • Quan, Hou-De;Du, Chuan-Bao;Cui, Pei-Zhang
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.3
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    • pp.941-955
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    • 2015
  • In dual-channel networks (DCNs), all frequency hopping (FH) sequences used for data channels are chosen from the original FH sequence used for the control channel by shifting different initial phases. As the number of data channels increases, the hitting frequency point problem becomes considerably serious because DCNs is non-orthogonal synchronization network and FH sequences are non-orthogonal. The increasing severity of the hitting frequency point problem consequently reduces the resource utilization efficiency. To solve this problem, we propose a novel hitting frequency point collision avoidance method, which consists of a sequence-selection strategy called sliding correlation (SC) and a collision avoidance strategy called keeping silent on hitting frequency point (KSHF). SC is used to find the optimal phase-shifted FH sequence with the minimum number of hitting frequency points for a new data channel. The hitting frequency points and their locations in this optimal sequence are also derived for KSHF according to SC strategy. In KSHF, the transceivers transmit or receive symbol information not on the hitting frequency point, but on the next frequency point during the next FH period. Analytical and simulation results demonstrate that unlike the traditional method, the proposed method can effectively reduce the number of hitting frequency points and improve the efficiency of the code resource utilization.

Real-Time Implementation of MPEG-1 Audio decoder on ARM RISC (ARM RISC 상에서의 MPEG-1 Audio decoder의 실시간 구현)

  • 김선태
    • Proceedings of the IEEK Conference
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    • 2000.11d
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    • pp.119-122
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    • 2000
  • Recently, many complex DSP (Digital Signal Processing) algorithms have being realized on RISC CPU due to good compilation, low power consumption and large memory space. But, real-time implementation of multiple DSP algorithms on RISC requires the minimum and efficient memory usage and the lower occupancy of CPU. In this thesis, the original floating-point code of MPEG-1 audio decoder is converted to the fixed-point code and then optimized to the efficient assembly code in time-consuming function in accord with RISC feature. Finally, compared with floating-point and fixed-point, about 30 and 3 times speed enhancements are achieved respectively. And 3~4 times memory spaces are spared.

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SELF-DUAL CODES AND FIXED-POINT-FREE PERMUTATIONS OF ORDER 2

  • Kim, Hyun Jin
    • Bulletin of the Korean Mathematical Society
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    • v.51 no.4
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    • pp.1175-1186
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    • 2014
  • We construct new binary optimal self-dual codes of length 50. We develop a construction method for binary self-dual codes with a fixed-point-free automorphism of order 2. Using this method, we find new binary optimal self-dual codes of length 52. From these codes, we obtain Lee-optimal self-dual codes over the ring $\mathbb{F}_2+u\mathbb{F}_2$ of lengths 25 and 26.

A New Analysis Method for Packed Malicious Codes (코드은닉을 이용한 역공학 방지 악성코드 분석방법 연구)

  • Lee, Kyung-Roul;Yim, Kang-Bin
    • Journal of Advanced Navigation Technology
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    • v.16 no.3
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    • pp.488-494
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    • 2012
  • This paper classifies the self-defense techniques used by the malicious software based on their approaches, introduces the packing technique as one of the code protection methods and proposes a way to quickly analyze the packed malicious codes. Packing technique hides a malicious code and restore it at runtime. To analyze a packed code, it is initially required to find the entry point after restoration. To find the entry point, it has been used reversing the packing routine in which a jump instruction branches to the entry point. However, the reversing takes too much time because the packing routine is usually obfuscated. Instead of reversing the routine, this paper proposes an idea to search some features of the startup code in the standard library used to generate the malicious code. Through an implementation and a consequent empirical study, it is proved that the proposed approach is able to analyze malicious codes faster.

Cost Estimation and Validation based on Natural Language Requirement Specifications

  • So Young Moon;R. Young Chul Kim
    • International Journal of Internet, Broadcasting and Communication
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    • v.15 no.2
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    • pp.218-226
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    • 2023
  • In Korea, we still use function point based cost estimations for software size and cost of a project. The current problem is that we make difficultly calculating function points with requirements and also have less accurate. That is, it is difficult for non-experts to analyze requirements and calculate function point values with them, and even experts often derive different function points. In addition, all stakeholders strongly make the validity and accuracy of the function point values of the project before /after the development is completed. There are methods for performing function point analysis using source code [1][2][3][4] and some researchers [5][6][7] attempt empirical verification of function points about the estimated cost. There is no research on automatic cost validation with source code after the final development is completed. In this paper, we propose automatically how to calculate Function Points based on natural language requirements before development and prove FP calculation based on the final source code after development. We expect validation by comparing the function scores calculated by forward engineering and reverse engineering methods.