• Journal of Broadcast Engineering
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• v.24 no.7
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• pp.1221-1227
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• 2019

This paper describes a low-density parity-check (LDPC) coded index modulated orthogonal frequency division multiplexing with quasi-orthogonal sequence (IM-OFDM-QOS) and provides performance evaluations of the proposed system. By using QOS as the spreading code, IM-OFDM-QOS scheme can improve the reception performance than IM-OFDM-SS scheme for a given data rate. On the other hand, LDPC code is widely used to the latest wireless communication systems as forward error correction (FEC) scheme and has Shannon-limit approaching performance. Therefore, by applying LDPC code to IM-OFDM-QOS system as FEC scheme, the reception performance can be further improved. Simulation results show that significant signal-to-noise ratio (SNR) gains can be obtained for LDPC coded IM-OFDM-QOS system compared to the LDPC coded IM-OFDM-SS system and the SNR gain increases with the higher code rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.9C
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• pp.721-728
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• 2010

CAMC (constant amplitude multi-code) has a better performance of error correction in iterative decoding than SPCPC (single parity check product code). CAMC benefits from a processing gain since it belongs to a spread spectrum signal. We show that the processing gain enhances the performance of CAMC. Additional correction of bit errors is achieved in the de-spreading of iteratively decoded signal. If the number of errors which survived the iterative decoding is less than or equal to ($\sqrt{N}/2-1$), all of the bit errors are removed after the de-spreading. We also propose a stopping criterion in the iterative decoding, which is based on the histogram of EI (extrinsic information). The initial values of EI are randomly distributed, and then they converge to ($-E_{max}$) or ($+E_{max}$) over the iterations. The strength of the convergence reflects how successfully error correction process is performed. Experimental results show that the proposed method achieves a gain of 0.2 dB in Eb/No.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.4
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• pp.430-435
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• 2018

In this paper, an improved decoding scheme for low-complexity parity-check(LCPC) code with small code length is proposed. The LCPC code is less complex than the turbo code or low density parity check(LDPC) code and requires less memory, making it suitable for communication between internet-of-things(IoT) devices. The IoT devices are required to have low complexity due to limited energy and have a low end-to-end delay time. In addition, since the packet length to be transmitted is small and the signal processing capability of the IoT terminal is small, the LCPC coding system should be as simple as possible. The LCPC code can correct all single errors and correct some of the two errors. In this paper, the proposed decoding scheme improves the bit error rate(BER) performance without increasing the complexity by correcting both errors using the soft value of the modulator output stage. As a result of the simulation using the proposed decoding scheme, the code gain of about 1.1 [dB] was obtained at the bit error rate of $10^{-5}$ compared with the existing decoding method.

• Journal of Communications and Networks
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• v.16 no.5
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• pp.479-484
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• 2014

In this paper, we consider the construction of cyclic and quasi-cyclic structured q-ary low-density parity-check (LDPC) codes over a designated small field. The construction is performed with a pre-defined sliding-window, which actually executes the regular mapping from original field to the targeted field under certain parameters. Compared to the original codes, the new constructed codes can provide better flexibility in choice of code rate, code length and size of field. The constructed codes over small fields with code length from tenths to hundreds perform well with q-ary sum-product decoding algorithm (QSPA) over the additive white Gaussian noise channel and are comparable to the improved spherepacking bound. These codes may found applications in wireless sensor networks (WSN), where the delay and energy are extremely constrained.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.18 no.5
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• pp.1412-1430
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• 2024

The soft cancellation list (SCANL) decoding algorithm for polar codes runs L soft cancellation (SCAN) decoders with different decoding factor graphs. Although it can achieve better decoding performance than SCAN algorithm, it has high latency. In this paper, a fast simplified SCANL (Fast-SSCANL) algorithm that runs L independent Fast-SSCAN decoders is proposed. In Fast-SSCANL decoder, special nodes in each factor graph is identified, and corresponding low-latency decoding approaches for each special node is propose first. Then, syndrome check aided Fast-SSCANL (SC-Fast-SSCANL) algorithm is further put forward. The ordinary nodes satisfied the syndrome check will execute hard decision directly without traversing the factor graph, thereby reducing the decoding latency further. Simulation results show that Fast-SSCANL and SC-Fast-SSCANL algorithms can achieve the same BER performance as the SCANL algorithm with lower latency. Fast-SSCANL algorithm can reduce latency by more than 83% compared with SCANL, and SC-Fast-SSCANL algorithm can reduce more than 85% latency compared with SCANL regardless of code length and code rate.

• Journal of Communications and Networks
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• v.10 no.1
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• pp.5-9
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• 2008

Researchers have investigated many upper bound techniques applicable to error probabilities on the maximum likelihood (ML) decoding performance of turbo-like codes and low density parity check (LDPC) codes in recent years for a long codeword block size. This is because it is trivial for a short codeword block size. Previous research efforts, such as the simple bound technique [20] recently proposed, developed upper bounds for LDPC codes and turbo-like codes using ensemble codes or the uniformly interleaved assumption. This assumption bounds the performance averaged over all ensemble codes or all interleavers. Another previous research effort [21] obtained the upper bound of turbo-like code with a particular interleaver using a truncated union bound which requires information of the minimum Hamming distance and the number of codewords with the minimum Hamming distance. However, it gives the reliable bound only in the region of the error floor where the minimum Hamming distance is dominant, i.e., in the region of high signal-to-noise ratios. Therefore, currently an upper bound on ML decoding performance for turbo-like code with a particular interleaver and LDPC code with a particular parity check matrix cannot be calculated because of heavy complexity so that only average bounds for ensemble codes can be obtained using a uniform interleaver assumption. In this paper, we propose a new bound technique on ML decoding performance for turbo-like code with a particular interleaver and LDPC code with a particular parity check matrix using ML estimated weight distributions and we also show that the practical iterative decoding performance is approximately suboptimal in ML sense because the simulation performance of iterative decoding is worse than the proposed upper bound and no wonder, even worse than ML decoding performance. In order to show this point, we compare the simulation results with the proposed upper bound and previous bounds. The proposed bound technique is based on the simple bound with an approximate weight distribution including several exact smallest distance terms, not with the ensemble distribution or the uniform interleaver assumption. This technique also shows a tighter upper bound than any other previous bound techniques for turbo-like code with a particular interleaver and LDPC code with a particular parity check matrix.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.1
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• pp.83-91
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• 1993

In the digital transmission system, cyclic redundancy check(CRC) code is widely used because it is easy to be implemented and has good performance in error detection. CRC code generator consists of several shift registers and modulo 2 adders. After manipulation of input data stream in the encoder, the remaining value of shift registers becomes CRC code. At the receiving side, error can be detected and corrected by CRC codes immediately transmitted after data stream. But, in the high speed system such as an A TM switch, it is difficult to implement the serial CRC encoder because of speed limitation of available semiconductor devices. In this paper, we propose the efficient parallel CRC encoder and syndrome calculator to solve the speed problem in implementing these functions using the existing semiconductor technology.

• Information and Communications Magazine
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• v.18 no.6
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• pp.74-91
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• 2001

본 고에서는 통신 시스템에 응용되고 있는 블록부호에 대한 소개와, IMT-2000 시스템의 표준화에서 채널 부호화 기법으로 규격에 반영된 길쌈부호(Convolutional code) 및 터보부호(Turbo code)에 대하여 소개하고, 현재 3세대 이동통신 표준화에서 논의중인 Hybrid ARQ(Adaptive Modulation and Coding), AMC(Adaptive Modulation and Coding) 기술에 대하여 설명한다. 그리고, 고속의 데이터 전송을 요하는 4세대 이동통신 시스템의 채널 부호화 기술로 현재 활발히 연구가 이루어지고 있는 Space-Time Code 및 LDPC(Low Density Parity Check Code)에 대해 소개하고, 차세대 이동통신 시스템의 채널 부호화 기술 전반에 대하여 전망한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3C
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• pp.216-225
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• 2007

This paper presents bit splitting methods to apply multilevel modulation to iterative codes such as turbo code, low density parity check code and turbo product code. Log-likelihood ratio method splits multilevel symbols to bits using the received in-phase and quadrature component based on Gaussian approximation. However it is too complicate to calculate and implement hardware due to exponential and log calculation. therefore this paper presents Euclidean, MAX and Sector method to reduce the high complexity of LLR method. We propose optimal bit splitting method for three iterative codes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37A no.11
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• pp.972-978
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• 2012

LDPC (low density parity check) code shows near Shannon limit performance by iterative decoding based on sum-product algorithm (SPA). Message updating procedure between variable and check nodes in SPA is done by a scheduling method. LDPC code shows different performance according to scheduling schemes. The conventional researches have been shown that the shuffled BP (belief propagation) algorithm shows better performance than the standard BP algorithm although it needs less number of iterations. However the reason is not analyzed clearly. Therefore the reason of difference in performance according to LDPC decoding algorithms is analyzed in this paper. 4 cases according to satisfaction of parity check condition are considered and compared. As results, the difference in the updating procedure in a cycle in the parity check matrix is considered to be the main reason of performance difference.