• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.35D no.5
• /
• pp.87-92
• /
• 1998

Ultr shallow p$^{+}$-n junction with Co/Ti bilayer silicidde contact was formed by ion implantation of BF$_{2}$ [energy : (30, 50)keV, dose:($5{\times}10^{14}$, $5{\times}10^{15}$/$\textrm{cm}^2$] onto the n-well Si(100) region and by RTA-silicidation and post annealing of the evaporated Co(120.angs., 170.angs.)/Ti(40~50.angs.) double layer. The sheet resistance of the silicided p$^{+}$ region of the p$^{+}$-n junction formed by BF2 implantation with energy of 30keV and dose of $5{\times}10^{15}$/$\textrm{cm}^2$ and Co/Ti thickness of $120{\AA}$/(40~$50{\AA}$) was about $8{\Omega}$/${\box}$. The junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$ -n ultra shallow junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$-n ultra shallow junction with Co/Ti bilayer silicide contact did not show any agglomeration or variation of sheet resistance value after post annealing at $850^{\circ}C$ for 30 minutes. The boron concentration at the epitaxial CoSi$_{2}$/Si interface of the fabricated junction was about 6*10$6{\times}10^{19}$ / $\textrm{cm}^2$./TEX>.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2002.07a
• /
• pp.288-291
• /
• 2002

Application of metal silicides such as TiSi$_2$ and CoSi$_2$ as contacts and gate electrodes are being studied. However, TiSi$_2$ due to the linewidth-dependance, and CoSi$_2$ due to the excessive Si consumption during silicidation cannot be applied to the deep-submicron MOSFET device. NiSi shows no such problems and can be formed at the low temperature. But, NiSi shows thermal instability. In this investigation, NiSi was formed with a Ti-capping layer to improve the thermal stability. Ni and Ti films were deposited by the thermal evaporator. The samples were then annealed in the N$_2$ ambient at 300-800$^{\circ}C$ in a RTA (rapid thermal annealing) system. Four point probe, FESEM, and AES were used to study the thermal properties of Ti-capped NiSi layers. The Ti-capped NiSi was stable up to 700$^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after 600$^{\circ}C$. The AES results revealed that the Ni diffusion further into the Si substrate was retarded by the capping layer, resulting in the suppression of agglomeration of NiSi films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.06a
• /
• pp.10-11
• /
• 2006

In this study, the Ni/Co/TiN (6/2/25 nm) structure was deposited for thermal stability estimation. Vacuum (30 mTorrs) annealing was carried out to compare with furnace annealing in nitrogen ambient. The proposed Ni/Co/TiN structure exhibited low temperature silicidation and wide range of rapid thermal process (RTP) windows. The sheet resistance was too high to measure after furnace annealing at $600^{\circ}C$ due to the thin thickness (15 nm) of the nickel silicide. However, the sheet resistance maintained stable characteristics up to $600^{\circ}C$ for 30 min after vacuum annealing. Therefore, the low resistance of thin film nickel silicide was obtained by vacuum annealing at $600^{\circ}C$.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.6 no.3
• /
• pp.273-277
• /
• 2005

We prepared $0.25\~l.5um$ poly silicon gate array test group with $SiO_2$ spacers in order to employ NiCo composite salicide process from 15nm Ni/15nm Co/poly structure. We investigate the residual metal shape evolution by varying the rapid thermal silicide anneal temperature from $700^{\circ}C\;to\;1100^{\circ}C$. We observed the residual metals agglomerated into maze type and line type on $SiO_2$ field and silicide gate, respectively as temperature increased. We propose that lower silicide temperature would be favorable in newly proposed NiCo salicide in order to lessen the agglomeration causing the leakage and scum formation.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.40 no.12
• /
• pp.1-9
• /
• 2003

In this paper, a novel Ni silicide technology with Cobalt interlayer and Titanium Nitride(TiN) capping layer for sub 100 nm CMOS technologies is presented, and the device parameters are characterized. The thermal stability of hi silicide is improved a lot by applying co-interlayer at Ni/Si interface. TiN capping layer is also applied to prevent the abnormal oxidation of NiSi and to provide a smooth silicidc interface. The proposed NiSi structure showed almost same electrical properties such as little variation of sheet resistance, leakage current and drive current even after the post silicidation furnace annealing at $700^{\circ}C$ for 30 min. Therefore, it is confirmed that high thermal robust Ni silicide for the nano CMOS device is achieved by newly proposed Co/Ni/TiN structure.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.20 no.4
• /
• pp.308-317
• /
• 2007

We fabricated thermally-evaporated 10 nm-Ni/(poly)Si and 10 nm-$Ni_{0.5}Co_{0.5}$/(Poly)Si structures to investigate the microstructure of nickel silicides at the elevated temperatures required lot annealing. Silicides underwent rapid annealing at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profilescope were employed for the determination of vortical microstructure and thickness. Nickel silicides with cobalt on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1100^{\circ}C$ and $900^{\circ}C$, respectively, while the conventional nickle monosilicide showed low resistance below $700^{\circ}C$. Through TEM analysis, we confirmed that a uniform, $10{\sim}15 nm$-thick silicide layer formed on the single-crystal silicon substrate for the Co-alloyed case while a non-uniform, agglomerated layer was observed for the conventional nickel silicide. On the polycrystalline silicon substrate, we confirmed that the conventional nickel silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo-alloy composite silicide process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

• Korean Journal of Materials Research
• /
• v.6 no.8
• /
• pp.779-785
• /
• 1996

Thin $700^{\circ}C$films were formed through layer inversion of Co/Nb bilayer during rapid thermal annealing(RTA). The Nb interlayer seems to effectively prevent over-consumption of Si and to control the silicidation reaction by forming Co-Nb intermetallic compounds and removing the native oxide formed on Si substrate which interferes the uniform Co-Si interaction. The final layer structure of the Co/Nb bilayer after $700^{\circ}C$ RTA was found to be ${Nb}_{2}{O}_{3}$/${Co}_{2}$Si.CoSi/${NbCo}_{x}$/Nb(O, C)/${CoSi}_{2}$/ Si. The layer inversion and the formation of a stable CoSi, phase occurred above $700^{\circ}C$, and the Nb silicides were not found at any annealing temperature. These may be due to the formation of very stable Co-Nb intermetallic compounds and Nb oxides which limit the moving of Co and Si.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.7 no.6
• /
• pp.1056-1063
• /
• 2006

Thermal evaporated 10 nm-Ni/l nm-Ir/(or polycrystalline)p-Si(100) and 10 nm-$Ni_{50}Co_{50}$/(or polycrystalline)p-Si(100) films were thermally annealed using rapid thermal annealing fur 40 sec at $300{\sim}1200^{\circ}C$. The annealed bilayer structure developed into Ni(Ir or Co)Si and resulting changes in sheet resistance, microstructure, phase and composition were investigated using a four-point probe, a scanning electron microscopy, a field ion beam, an X-ray diffractometer and an Auger electron spectroscope. The final thickness of Ir- and Co-inserted nickel silicides on single crystal silicon was approximately 20$\sim$40 nm and maintained its sheet resistance below 20 $\Omega$/sq. after the silicidation annealing at $1000^{\circ}C$. The ones on polysilicon had thickness of 20$\sim$55 nm and remained low resistance up to $850^{\circ}C$. A possible reason fur the improved thermal stability of the silicides formed on single crystal silicon substrate is the role of Ir and Co in preventing $NiSi_2$ transformation. Ir and Co also improved thermal stability of silicides formed on polysilicon substrate, but this enhancement was lessened due to the formation of high resistant phases and also a result of silicon mixing during high temperature diffusion. Ir-inserted nickel silicides showed surface roughness below 3 nm, which is appropriate for nano process. In conclusion, the proposed Ir- and Co- inserted nickel silicides may be superior over the conventional nickel monosilicides due to improved thermal stability.

• Transactions on Electrical and Electronic Materials
• /
• v.9 no.4
• /
• pp.137-142
• /
• 2008

The parasitic resistance is studied to silicon/metal contact junction for improving device performance and to lower contact/serial resistance silicide in natural sequence. In this paper constructs the stepwise Ni silicide process for parasitic resistance reduction for silicon/metal contact junction. We have investigated multi-step Ni silicide on SiGe substrate with stepwise annealing method as an alternative to compose more thermally reliable Ni silicide layer. Stepwise annealing for silicide formation is exposed to heating environment with $5^{\circ}C/sec$ for 10 seconds and a dwelling for both 10 and 30 seconds, and ramping-up and the dwelling was repeated until the final annealing temperature of $700\;^{\circ}C$ is achieved. Finally a direct comparison for single step and stepwise annealing process is obtained for 20 nm nickel silicide through stepwise annealing is $5.64\;{\Omega}/square$ at $600\;^{\circ}C$, and it is 42 % lower than that of as nickel sputtered. The proposed stepwise annealing for Ni silicidation can provide the least amount of NiSi at the interface of nickel silicide and silicon, and it provides lower resistance, higher thermal-stability, and superior morphology than other thermal treatment.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.8 no.2
• /
• pp.195-200
• /
• 2007

We fabricated thermally-evaporated 10 nm-Ni/70 w-Poly-Si/200 $nm-SiO_2/Si$ and $10nm-Ni_{0.5}Co_{0.5}/70$ nm-Poly-Si/200 $nm-SiO_2/Si$ structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required fur annealing. Silicides underwent rapid anneal at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of the polycrystalline silicon substrate mimicking the gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profile scope were employed for the determination of cross sectional microstructure and thickness. 20nm thick nickel cobalt composite silicides on polycrystalline silicon showed low resistance up to $900^{\circ}C$, while the conventional nickle silicide showed low resistance below $900^{\circ}C$. Through TEM analysis, we confirmed that the 70nm-thick nickel cobalt composite silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. We identified $Ni_3Si_2,\;CoSi_2$ phase at $700^{\circ}C$ using an X-ray diffractometer. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo composite silicide from NiCo alloy films process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.