• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.12
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• pp.1-9
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• 2003

In this paper, a novel Ni silicide technology with Cobalt interlayer and Titanium Nitride(TiN) capping layer for sub 100 nm CMOS technologies is presented, and the device parameters are characterized. The thermal stability of hi silicide is improved a lot by applying co-interlayer at Ni/Si interface. TiN capping layer is also applied to prevent the abnormal oxidation of NiSi and to provide a smooth silicidc interface. The proposed NiSi structure showed almost same electrical properties such as little variation of sheet resistance, leakage current and drive current even after the post silicidation furnace annealing at $700^{\circ}C$ for 30 min. Therefore, it is confirmed that high thermal robust Ni silicide for the nano CMOS device is achieved by newly proposed Co/Ni/TiN structure.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.11
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• pp.1149-1155
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• 2004

In this paper, novel methods for improvement of thermal stability of Ni-germano Silicide were proposed for nano CMOS applications. It was shown that there happened agglomeration and abnormal oxidation in case of Ni-germano Silicide using Ni only structure. Therefore, 4 kinds of tri-layer structure, such as, Ti/Ni/TiN, Ni/Ti/TiN, Co/Ni/TiN and Ni/Co/TiN were proposed utilizing Co and Ti interlayer to improve thermal stability of Ni-germano Silicide. Ti/Ni/TiN structure showed the best improvement of thermal stability and suppression of abnormal oxidation although all kinds of structures showed improvement of sheet resistance. That is, Ti/Ni/TiN structure showed only 11 ohm/sq. in spite of 600 $^{\circ}C$, 30 min post silicidation annealing while Ni-only structure show 42 ohm/sq. Therefore, Ti/Ni/TiN structure is highly promising for nano-scale CMOS technology.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.61-61
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• 2000

Device의 고성능화를 위하여 소자의 고속화, 고집적화가 가속됨에 따라 SALICIDE Process가 더욱 절실하게 요구되고 있다. 이러한 SALICIDE Process의 재료로써는 metal/silicide 중에서 비저항이 가장 낮은 TiSi2(15-25$\mu$$\Omega$cm), CoSi2(17-25$\mu$$\Omega$cm)가 일반적으로 많이 연구되어 왔다. 그러나 Ti-silicide의 경우 Co-silicide는 배선 선폭의 감소에 따른 면저항 값의 변화가 작으며, 고온에서 안정하고, 도펀트 물질과 열역학적으로 안정하여 화합물을 형성하지 않는다는 장점이 있으마 Ti처럼 자연산화막을 제거할 수 없어 Si 기판위에 자연산화막이 존재시 균일한 실리사이드 박막을 형성할 수 없는 단점등을 가지고 있다. 본 연구에서는 Ti Capping layer 에 의한 균일한 Co-silicide의 형성을 일반적인 Si(100)기판과 SCl 방법에 의하여 chemical Oxide를 성장시킨 Si(100)기판의 경우에 대하여 연구하였다. 스퍼터링 방법에 의해 Co를 150 증착후 capping layer로써 TiN, Ti를 각각 100 씩 증착하였다. 열처리는 RTP를 이용하여 50$0^{\circ}C$~78$0^{\circ}C$까지 4$0^{\circ}C$ 구간으로 N2 분위기에서 30초 동안 열처리를 한후, selective metal strip XRD, TEM의 분석장비를 이용하여 관찰하였다. lst RTP후 selective metal strip 후 면저항의 측정과 XRD 분석결과 낮은 면저항을 갖는 CoSi2로의 상전이는 TiN capping과 Co 단일박막이 일반적인 Si(100)기판과 interfacial oxide가 존재하는 Si(100)기판위에서 Ti capping의 경우보다 낮은 온도에서 일어났다. 또한 CoSi에서 CoSi2으로 상전이는 일반적인 Si(100)기판위에서 보다 interfacial Oxide가 존재하는 Si(100)기판 위에 TiN capping과 Co 단일박막의 경우 열처리 후에도 Oxide가 존재하는 불균인한 CoSi2박막을 관찰하였으며, Ti capping의 경우 Oxise가 존재하지 않는 표면과 계면이 더 균일한 CoSi2 박막을 형성 할 수 있었다.

• Korean Journal of Materials Research
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• v.13 no.11
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• pp.711-716
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• 2003

Gate length, height, and silicide thickness have all been shrinking linearly as device density has progressively increased over the years. We investigated the effect of the cobalt diffusion during the silicide formation process on the 60$\AA$-thick gate oxide lying underneath the Ti/Co and Co/Ti bilayers. We prepared four different cobalt silicides, which have similar sheet resistance, made from the film structure of Co/Ti(interlayer), and Ti(capping layer)/Co, and peformed the current-voltage, time-to-break down, and capacitance-voltage measurements. Our result revealed that the cobalt silicide process without the Ti capping layer allowed cobalt atoms to diffuse into the upper interface of gate oxides. We propose that 100$\AA$-thick titanium interlayer may lessen the diffusion of cobalt to gate oxides in 1500-$\AA$ height polysilicon gates.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.5
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• pp.390-396
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• 2003

As the design rule of device continued to shrink, the contact resistance in small contact size became important. Although the conventional TiN/Ti structure as a ohmic layer has been widely used, we propose a new TiN/Co film structure. We characterized a contact resistance by using a chain pattern and a KELVIN pattern, and a leakage current determined by current-voltage measurements. Moreover, the microstructure of TiN/ Ti/ silicide/n$\^$+/ contact was investigated by a cross-sectional transmission electron microscope (TEM). The contact resistance by the Co ohmic layer showed the decrease of 26 % compared to that of a Ti ohmic layer in the chain resistance, and 50 ％ in KELYIN resistance, respectively. A Co ohmic layer shows enough ohmic behaviors comparable to the Ti ohmic layer, while higher leakage currents in wide area pattern than Ti ohmic layer. We confirmed that an uniform silicide thickness and a good interface roughness were able to be achieved in a CoSi$_2$ Process formed on a n$\^$+/ silicon junction from TEM images.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.438-439
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• 2013

Microelectronic devices의 접촉저항의 향상을 위해 Metal silicides의 형성 mechanism과 전기적 특성에 대한 연구가 많이 이루어지고 있다. 지난 수십년에 걸쳐, Ti silicide, Co silicide, Ni silicide 등에 대한 개발이 이루어져 왔으나, 계속적인 저저항 접촉 소재에 대한 요구에 의해 최근에는 Rare earth silicide에 관한 연구가 시작되고 있다. Rare-earth silicide는 저온에서 silicides를 형성하고, n-type Si과 낮은 schottky barrier contact (~0.3 eV)를 이룬다. 또한, 비교적 낮은 resistivity와 hexagonal AlB2 crystal structure에 의해 Si과 좋은 lattice match를 가져 Si wafer에서 high quality silicide thin film을 성장시킬 수 있다. Rare earth silicides 중에서 ytterbium silicide는 가장 낮은 electric work function을 갖고 있어 낮은 schottky barrier 응용에서 쓰이고 있다. 이로 인해, n-channel schottky barrier MOSFETs의 source/drain으로써 주목받고 있다. 특히 ytterbium과 molybdenum co-deposition을 하여 증착할 경우 thin film 형성에 있어 안정적인 morphology를 나타낸다. 또한, ytterbium silicide와 마찬가지로 낮은 면저항과 electric work function을 갖는다. 그러나 ytterbium silicide에 molybdenum을 화합물로써 높은 농도로 포함할 경우 높은 schottky barrier를 형성하고 epitaxial growth를 방해하여 silicide film의 quality 저하를 야기할 수 있다. 본 연구에서는 ytterbium과 molybdenum의 co-deposition에 따른 silicide 형성과 전기적 특성 변화에 대한 자세한 분석을 TEM, 4-probe point 등의 다양한 분석 도구를 이용하여 진행하였다. Ytterbium과 molybdenum을 co-deposition하기 위하여 기판으로 $1{\sim}0{\Omega}{\cdot}cm$의 비저항을 갖는 low doped n-type Si (100) bulk wafer를 사용하였다. Native oxide layer를 제거하기 위해 1%의 hydrofluoric (HF) acid solution에 wafer를 세정하였다. 그리고 고진공에서 RF sputtering 법을 이용하여 Ytterbium과 molybdenum을 동시에 증착하였다. RE metal의 경우 oxygen과 높은 반응성을 가지므로 oxidation을 막기 위해 그 위에 capping layer로 100 nm 두께의 TiN을 증착하였다. 증착 후, 진공 분위기에서 rapid thermal anneal(RTA)을 이용하여 $300{\sim}700^{\circ}C$에서 각각 1분간 열처리하여 ytterbium silicides를 형성하였다. 전기적 특성 평가를 위한 sheet resistance 측정은 4-point probe를 사용하였고, Mo doped ytterbium silicide와 Si interface의 atomic scale의 미세 구조를 통한 Mo doped ytterbium silicide의 형성 mechanism 분석을 위하여 trasmission electron microscopy (JEM-2100F)를 이용하였다.

• Korean Journal of Materials Research
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• v.8 no.6
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• pp.484-492
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• 1998

The formation mechanism of the epitaxial cobalt silicide from Co/Ti/OOO) Si structure has been investigated. The transition temperature of CoSi to CoSi, was found to increase with increasing the Ti interlayer thickness, which may be owing to the occupation of the tetrahedral sites by Ti atoms in the CoSi crystal structure as well as the blocking effect of the Ti interlayer on the diffusion of Co. Also, the Co- Ti-O ternary compound formed at the metal! Si interface at the begining of silicidation, which seems to play an important role in epitaxial growth of Co silicide. The final layer structures obtained after a rapid thermal annealing of the Cot Ti/( 100) Si bi-layer structure turned out to be Ti oxide/Co- Ti-Si/epi-$CoSi_2$/OOO)

• Korean Journal of Materials Research
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• v.8 no.7
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• pp.579-583
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• 1998

Silicide layer structures, agglomeration of silicide layers, and dopant redistributions for the Co/Ti bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The $CoSi_2$ phase transition temperature is higher and agglomeration of the silicide layer occurs more severely for the Co/Ti bilayer on the doped polycrystalline Si substrate than on the single Si substrate. Also, dopant loss by outdiffusion is much more significant on the doped polycrystalline Si substrate than on the single Si substrate. All of these differences are attributed to the grain boundary diffusion and heavier doping concentration in the polycrystalline Si. The layer structure after silicidation annealing of Co/ Tildoped - polycrystalline Si is polycrystalline CoSi,/polycrystalline Si, while that of Co/TiI( 100) Si is Co- Ti- Si/epi- CoSi,/(lOO) Si.

• Journal of the Korean Vacuum Society
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• v.9 no.4
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• pp.335-340
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• 2000

We investigated the role of the capping layers in the formation of the cobalt silicide in Co/Si systems with TiN and Ti capping layers and without capping layers. The Co/Si interfacial reactions and the phase transformations by the rapid thermal annealing (RTA) processes were observed by sheet resistance measurements, XRD, SIMS and TEM analyses for the clean silicon substrate as well as for the chemically oxidized silicon substrate by $H_2SO_4$. We observed the retardation of the cobalt disilicide formation in the Co/Si system with Ti capping layers. In the case of Co/$SiO_2$/Si system, cobalt silicide was formed by the Co/Si reaction due to with the dissociation of the oxide layer by the Ti capping layers.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.5
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• pp.87-92
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• 1998

Ultr shallow p$^{+}$-n junction with Co/Ti bilayer silicidde contact was formed by ion implantation of BF$_{2}$ [energy : (30, 50)keV, dose:($5{\times}10^{14}$, $5{\times}10^{15}$/$\textrm{cm}^2$] onto the n-well Si(100) region and by RTA-silicidation and post annealing of the evaporated Co(120.angs., 170.angs.)/Ti(40~50.angs.) double layer. The sheet resistance of the silicided p$^{+}$ region of the p$^{+}$-n junction formed by BF2 implantation with energy of 30keV and dose of $5{\times}10^{15}$/$\textrm{cm}^2$ and Co/Ti thickness of $120{\AA}$/(40~$50{\AA}$) was about $8{\Omega}$/${\box}$. The junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$ -n ultra shallow junction depth including silicide thickness of about $500{\AA}$ was 0.14${\mu}$. The fabricated p$^{+}$-n ultra shallow junction with Co/Ti bilayer silicide contact did not show any agglomeration or variation of sheet resistance value after post annealing at $850^{\circ}C$ for 30 minutes. The boron concentration at the epitaxial CoSi$_{2}$/Si interface of the fabricated junction was about 6*10$6{\times}10^{19}$ / $\textrm{cm}^2$./TEX>.