• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.10
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• pp.56-63
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• 2015

Not only performance analysis but also power analysis at early design stages is important in designing a system-on-chip. We propose a power modeling based on clock gating enable signals that enables accurate power analysis at a high-level. Power state is defined as combinations of the values of the clock gating enable signals and we can extract the clock gating enable signals to generate the power model automatically. Experimental results show that the average power accuracy is about 96% and the speed gain of power analysis at the high-level power is about 280 times compared to that at the gate-level.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.9A
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• pp.868-877
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• 2006

Sensor network applications need synchronized time to the highest degree such as object tracking, consistent state updates, duplicate detection, and temporal order delivery. In addition, reliability issues and fault tolerance in sophisticated sensor networks have become a critical area of research today. In this paper, we proposed a fault tolerant clock management scheme in sensor networks considering two cases of fault model such as network faults and clock faults. The proposed scheme restricts the propagation of synchronization error when there are clock faults of nodes such as rapid fluctuation, severe changes in drift rate, and so on. In addition, it handles topology changes. Simulation results show that the proposed method has about $1.5{\sim}2.0$ times better performance than TPSN in the presence of faults.

• The Journal of Korean Society for School & Community Health Education
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• v.13 no.2
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• pp.107-118
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• 2012

Backgrounds: In order to prevent dental injuries that often occur in child and adolescent, it is intended to investigate and assess actual state of the injury development, present epidemiological background, and consider and discuss for preparing preventive means against the injury development. Purpose: It was attempted to understand major features of dental injuries developing in child and adolescent and indentify high risk factors of dental injuries in child and adolescent. Methods: In this study, 523 cases of computerized data collected as disease entities of dental injuries among 1-18 years old patient visiting S university hospital located in Seoul in 2009 were analyzed and following results were obtained. Results: It was found that the ratio of dental injuries by genders in child and adolescent was 66.14% of male and 33.86% of female. It was shown also that causes of dental injuries by ages were more in order of falling, bumping, chewing, traffic accident, sports, violence, and crash. In addition places where dental injuries occur by ages were home in less than 5 year old group, park, playground, and play yard in 6-11 year old group, park, playground, and play yard also in 12-14 year old group, and stairs, road, and outdoor places such as mountain climbing, beach, and camping in 15-18 year old group. It was found that time rages when dental injuries in child and adolescent often develop were 15-19 o'clock for falling, 15-19 o'clock for crash, 15-19 o'clock for bumping, 19-03 o'clock for violence, 15-19 o'clock for traffic accident, 15-19 o'clock for sports activity, and 15-19 o'clock for chewing. Conclusion: Background of dental injury inducing factors are very complicated and diversified, so deep study and analysis are required for its prediction. Therefore, it seems necessary to identify risk factors by phases such as before, at, and after accident, establish strategies to reduce injury development, and develop and utilize necessary programs.

• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.305-309
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• 2011

This paper proposes a new rotational frequency detector (RFD) for phase-locked loop (PLL) or clock and data recovery (CDR) applications for fast frequency acquisition. The proposed RFD uses the four states finite state machine (FSM) model to accelerate the frequency acquisition time. It is modeled and simulated with MATLAB Simulink. The functionalities of the proposed RFD are examined and the results are compared to those of a conventional RFD. The proposed RFD's frequency acquisition time is four times faster than that of a conventional one. The proposed RFD incorporated with a phase detector (PD) in PLL or CDR is expected to improve the frequency and phase acquisition performance later greatly.

• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.5
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• pp.1-6
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• 1977

When the input of synchronizer which is used for the purpose of synchronizing the master clock of computer with the interrupt system, a sort of random variable device, is gated with asynchronous intersection of the fall time of the master clock and the risetime oi the interrupt request, synchronizer is drived in Metastable region. This paper is presented circuit analysis of Metastable phenomena and analysis for transient process from metastable point to stable state, and also realities the collect logic with Inverter and open collector methods with a view to improving logic failure caused by the mishappen phenomena.

• Proceedings of the Korean Society of Agricultural Engineers Conference
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• 1998.10a
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• pp.224-229
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• 1998

This study was conducted to develop the simple and convenient irrigation control model which can maintain the appropriate rates of irrigation and drainage of nutrient solution according to the environmental conditions and growth stages in soilless culture of cucumber. In order to obtain fundamental data for development of the model, investigation of the actual state of soilless culture practices was carried out. Most irrigation systems of soilless culture were controlled by the time clock. Evapotranspiration of cucumber in soilless culture was investigated and correlations with environmental conditions were analyzed, and its prediction model was developed. A irrigation control model based on the time clock control and there were considered seasons, weather conditions, and growth stages was developed. Applicability of the model was tested by simulation. Drainage rates of irrigation system controlled by conventional time clock, integrated solar radiation, and the developed model were 61%, 20%, and 32%, respectively in cucumber perlite culture.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.3
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• pp.264-274
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• 2014

Time synchronization becomes a critical issue in underwater acoustic networks (UANets) because nodes cooperate together or individually work by communicating each other in diverse underwater applications. Compared with the time synchronization approaches in terrestrial networks, several intrinsic limitations of UANets (e.g., the unavailability of GPS, long propagation delay, mobility due to currents, limited energy consumption, or low data rate) need to be considered in synchronizing the timing among underwater nodes. For the purpose of developing more efficient time synchronization protocols for UANets, we review the existing approaches, which estimate both the clock offset and the clock skew of underwater nodes. Finally, we outline the state-of-the art time synchronization protocols for UANets by comparing and summarizing them according to their synchronization characteristics.

• IEMEK Journal of Embedded Systems and Applications
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• v.16 no.4
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• pp.119-127
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• 2021

The aim of this paper is to propose a less conservative stabilization condition for leader-following sampled-data control of wheeled mobile robot (WMR) systems by using a clock-dependent Lyapunov function (CDLF) with looped functionals. In the leader-following WMR system, the state and input of the leader robot are measured by digital devices mounted on the following robot, and they are utilized to construct the sampled-data controller of the following robot. To design the sampled-data controller, a stabilization condition is derived by using the CDLF with looped functionals, and formulated in terms of sum of squares (SOS). The considered Lyapunov function is a polynomial form with respect to the clock related to the transmitted sampling instants. As the degree of the Lyapunov function increases, the stabilization condition becomes less conservative. This ensures that the designed controller is able to stabilize the system with a larger maximum sampling interval. The simulation results are provided to demonstrate the effectiveness of the proposed method.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.28-35
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• 2015

In this paper, we propose to identify redundant power states of high-level power model based on clock gating enable signals(CGENs) using dependencies of Boolean functions and structural dependencies of clock gating cells. Three functional dependencies between two CGENs, namely equvalence, inversion, and inclusion, are used. Functions of CGENs in a circuit are represented by binary decision diagrams (BDDs) and the functional relations are used to reduce the number of power states. The structural dependency appears when a clock gating cell drives another clock gating cells in a circuit. Automatic dependency checking algorithm has been proposed. The experimental results show the average number of power state is reduced by 59%.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.3
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• pp.128-133
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• 1998

This paper is study on performance analysis of modulator using direct digital frequency synthesizer of Initial Clock Accumulating Method. It has been generally used for PLL or digital frequency synthesizing method to be synthesizd randomly chosen frequency state. In order to improve disadvantage of two methods, we constructed modulator system using DDFS of Initial Clock Accumulating Method. We also confirmed the coherence frequency hopping state and possibility of phase control. The results obtained from the experiments are as follows; First, the synthesized output frequency is proportional to the sampling frequency, according to index, K. Second, the difference of the gain between the basic frequency and the harmonic frequencies was more than 50 [dB], that is, this means facts that is reduced the harmonic frequency factor. Third, coherence frequency hopping state is confirmed by PN code sequence. Here, we confirmed the proposed method cut switching time, this verify facts that is the best characteristic of the frequency hopping. We also verified the fact that the phase varies as the adder is operated set or reset.