• 전기학회논문지
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• 제56권9호
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• pp.1643-1647
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• 2007

Recently, there is a need for research concerning the technologies and precaution methods against electronic bomb assaults. There lays perplex constitution and much coupling phenomenon in this type of system, and thus requires much time and memory in order to translate the system with the existing translation methods. Applying the EMT (Electromagnetic Topology) would prove much more efficient. In this paper, EMT has been applied to the circuit-like micro system, previously employed in micro systems. Also, each section has been interpreted using the BLT (Baum, Liu, Tesche) equation using the EMT, then reconstructed, consequentially interpreting an entire system. In this paper, a simple circuit containing active and passive elements based on a CPW has been interpreted employing the BLT equation, and has been proven by experiment using the circuit simulation, a simulation officially recognized for its accuracy in interpreting small structures. The interpretation results have been presented by an S-parameter, and by comparing the interpretation results attained through the BLT equation and that from common simulation to that from experimentation, that the BLT equation turned out to be the most reliable interpretation method could be found.

• Journal of Power Electronics
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• 제4권3호
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• pp.161-168
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• 2004

This paper presents a new circuit topology of high-frequency soft switching commutation boost type PWM chopper-fed DC-DC power converter with a loadside auxiliary passive resonant snubber. In the proposed boost type chopper-fed DC-DC power converter circuit operating under a principle of ZCS turn-on and ZVS turn-off commutation, the capacitor and inductor in the auxiliary passive resonant circuit works as the lossless resonant snubber. In addition to this, the voltage and current peak stresses of the power semiconductor devices as well as their di/dt or dv/dt dynamic stress can be effectively reduced by the single passive resonant snubber treated here. Moreover, it is proved that chopper-fed DC-DC power converter circuit topology with an auxiliary passive resonant snubber could solve some problems on the conventional boost type hard switching PWM chopper-fed DC-DC power converter. The simulation results of this converter are illustrated and discussed as compared with the experimental ones. The feasible effectiveness of this soft witching DC-DC power converter with a single passive resonant snubber is verified by the 5kW, 20kHz experimental breadboard set up to be built and tested for new energy utilization such as solar photovoltaic generators and fuel sell generators.

• Journal of Electrical Engineering and Technology
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• 제12권3호
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• pp.1156-1165
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• 2017

A high performance interleaved bridgeless boost power factor correction (PFC) rectifier operating under the critical current conduction mode (CrM) is proposed in this paper to improve the efficiency and system performance of various applications, such as nano-grid systems. By combining the interleaved technique with the bridgeless topology, the circuit contains two independent branches without rectifier diodes. The branches operate in interleaved mode for each respective half-line period. Moreover, when operating in CrM, all the power switches take on soft-switching, thereby reducing switching losses and raising system efficiency. In addition, the input current flows through a minimum amount of power devices. By employing a commercial PFC controller, an effective control scheme is used for the proposed circuit. The operating principle of the proposed circuit is presented, and the design considerations are also demonstrated. Simulations and experiments have been carried out to evaluate theoretical analysis and feasibility of the proposed circuit.

• Journal of Power Electronics
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• 제2권2호
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• pp.112-123
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• 2002

This paper presents a novel prototype of the utility AC power interfaced soft-switching sinewave pulse modulated inverter using the high-frequency flyback for the small scale distributed renewable energy power conditioner. The proposed cricuit with a high-frequency isolation link has a funtion of electrical isolation, which is more cost-effective and reliable for the small-scale distributed renwal energy utilization system from a safety point of riew. The discontinuous conduction mode(DCM) operation of the high-frequency flyback transformer is adopted to establish a simple and low-cost circuit configuration and control scheme. For the simplicity, the circuit operating principle is described on the basis of the modified conventional full bridge inverter, whitch is the typical conventional high-frequency full-bridge inverter employing the high requency flyback transformer to eanble the effictive function of the electrical isolation. Than, the new circuit topology of the unility-interfaced soft-switching sinewave pulse modulated inverter using IGBTs is proposed. The proposed cricuit topology is additionally composed of the auxiliary power regenerating snubber cricuits, which are also mathematically analyzed for the parameter desigen settings. Finally, the performance of the propose inverter is evaluated on the basis of computer-aid simulation. It is noted that the sinewave pulse modulated output current of the inverter is synchronous to the AC main voltage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.401-402
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• 2015

In this paper a direct cell-to-cell charge balancing circuit which can transfer the charge from any cell to any cell in the battery string is introduced. In the proposed topology the energy in the high voltage cell is transferred to the low voltage cell through the simple operation of a dc-dc converter to get fast equalization. Furthermore, the charge equalization can be performed regardless of the battery module operation whether it is being charged, discharged or relaxed. The monitoring circuit composed of a DSP and a battery monitoring IC is designed to monitor the cell voltage and protect the battery. In order to demonstrate the advantages of the proposed topology, a prototype circuit was designed and applied to 12 Lithium-Ion battery module. It has been verified with the experiments that the charge equalization time of the proposed method was shortest compared with those of other methods.

• 전력전자학회논문지
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• 제26권5호
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• pp.372-375
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• 2021

A three-leg inverter-type isolated DC-DC Converter that can use 220 and 440 V grid input voltages is introduced. The secondary circuit structure of the proposed topology is center-tap, which is the same as the conventional phase-shifted full-bridge converter. However, the primary circuit structure is composed of a three-leg inverter structure and a transformer, in which two primary windings are connected in series. The proposed circuit structure has a wider input voltage range than the conventional phase-shifted full-bridge converter, and the circulating-current on the primary-side is reduced. In addition, the voltage stress at the secondary rectifier is greatly improved, and high efficiency can be achieved at a high input voltage by removing the snubber circuit added to the conventional converter. Prototype converters with input DC of 311 V, output of 622 V, and 50 V and 6 kW class specifications were designed and manufactured to verify the validity of the proposed topology; the experimental results are presented.

• Journal of Power Electronics
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• 제19권5호
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• pp.1074-1086
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• 2019

This paper presents the design and implementation of an improved cascaded multilevel inverter topology with asymmetric DC sources. This experimental inverter topology is a stand-alone system with simulations and experiments performed using resistance loads. The topology uses four asymmetric binary DC sources that are independent from each other and one H-bridge. The topology was simulated using PSIM software before an actual prototype circuit was tested. The proposed topology was shown to be very efficient. It was able to generate a smooth output waveform up to 31 levels with only eight switches. The obtained simulation and experimental results are almost identical. In a 1,200W ($48.3{\Omega}$) resistive load application, the THDv and efficiency of the topology were found to be 1.7% and 97%, respectively. In inductive load applications, the THDv values were 1.1% and 1.3% for an inductive load ($R=54{\Omega}$ dan L=146mH) and a 36W fluorescent lamp load with a capacitor connected at the dc bus.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2935-2938
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• 2003

A new Valley-fill circuit for improving PF(power factor) is proposed in this paper. The proposed topology combines Valley-fill rectifier and an additional inductor for boosting. In the proposed circuit, a shapc of input current is related to the PWM duty cycle. The boosting inductor makes improve PF by the electric charge transfer action. The operation principle and the shape of input current arc analyzed as applied the boosting inductor. The optimum value of boosting inductor is determined. A 100W single-stage converter has been designed and tested. Experimental results are presented to verify the validity of the proposed converter.

• Journal of Electrical Engineering and Technology
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• 제8권6호
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• pp.1328-1336
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• 2013

Nowadays multilevel inverters are developing generally due to reduced voltage stress on power switches and low total harmonic distortion (THD) in output voltage. However, for increasing the output voltage levels the number of circuit devices are increased and it results in increasing the cost of converter. In this paper, a novel multilevel inverter is proposed. The suggested topology uses less number of power switches and related gate drive circuits to generate the same level in output voltage with comparison to traditional cascaded multilevel inverter. With the proposed topology all levels in output voltage can be realized. As an illustration, a symmetric 13-level and asymmetric 29-level proposed inverters have been simulated and implemented. The total peak inverse (PIV) and power losses of presented inverter are calculated and compared with conventional cascaded multilevel inverter. The presented analyses show that the power losses in the suggested multilevel inverter are less than the traditional inverters. Presented simulation and experimental results demonstrate the feasibility and applicability of the proposed inverter to obtain the maximum number of levels with less number of switches.

• 한국산업융합학회 논문집
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• 제20권2호
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• pp.115-124
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• 2017

This paper aims to develop an SMPS topology for handling a high range of input voltages based on a DC-DC flyback converter circuit. For this purpose, 2 capacitors of the same specifications were serially connected on the input terminal side, with a flyback converter of the same circuit configuration serially connected to each of them, so as to achieve high input voltage and an effect of dividing input voltage. The serially connected flyback converters have the transformer turn ratio of 1:1, so that each coil is used for the winding of a single transformer, which is a characteristic of doubly-fed configuration and enables the correction of input capacitor voltage imbalance. In addition, a pulse transformer was designed and fabricated in a way that can achieve the isolation and noise robustness of the PWM output signal of the PWM controller that applies gate voltage to individual flyback converter switches. PSIM simulation was carried out to verify such a structure and confirm its feasibility, and a 100W class stack was fabricated and used to verify the feasibility of the proposed high voltage SMPS topology.