• 제목/요약/키워드: Circuit topology

검색결과 527건 처리시간 0.024초

역전류 주입방식기반의 DC차단기의 개선된 토폴로지 (An Improved Topology of DC Circuit Breaker Based on Inverse Current Injection Method)

  • 조영배;손호익;김학만;곽주식;안용호
    • 전기학회논문지
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    • 제63권11호
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    • pp.1491-1496
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    • 2014
  • VSC-HVDC system is vulnerable to a DC fault because the fault current can be injected from AC system to DC system during the fault. Therefore, DC circuit breaker is required to isolate faults in VSC-HVDC system. The inverse current injection method of circuit breaker has been considered as DC circuit breaker. However, the topology has drawback that the breaking time is longer than hybrid circuit breaker using semiconductor devices. In order to solve this problem, this paper proposes an improved topology of circuit breaker based on inverse current injection method. In addition, the proposed topology will be compared with the existing topology. And we will verify its effects by using the simulation results.

Electromagnetic Topology(EMT) 기법을 이용한 Printed Circuit Boards(PCBs) 기판 해석 (Analysis of Printed Circuit Boards Based on Electromagnetic Topology)

  • 황세훈;이정엽;정현교;박윤미
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2006년도 하계학술대회
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    • pp.170-174
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    • 2006
  • In this paper electromagnetic topology (EMT) is used to analyze the lumped components on printed circuit boards (PCBs). It is difficult to obtain desirable results about the electromagnetic coupling problems by using a numerical or an experimental method on complex systems. The EMT can be considered as a helpful method to the analysis of electromagnetic interference / electromagnetic compatibility (EMI/EMC) problems in the complex system. To verify the validity of this method, three types of the PCBs mounting a simple circuit are fabricated and experimented.

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대칭적인 스위치 구조 기반 RF 플라즈마 시스템 적용 전기적 가변 커패시터 (Electrical Variable Capacitor based on Symmetrical Switch Structure for RF Plasma System)

  • 민주화;채범석;김현배;서용석
    • 전력전자학회논문지
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    • 제24권3호
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    • pp.161-168
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    • 2019
  • This study introduces a new topology to decrease the voltage stress experienced by a 13.56 MHz electrical variable capacitor (EVC) circuit with an asymmetrical switch structure applied to the impedance matching circuit of a radio frequency (RF) plasma system. The method adopts a symmetrical switch structure instead of an asymmetrical one in each of the capacitor's leg in the EVC circuit. The proposed topology successfully reduces voltage stress in the EVC circuit due to the symmetrical charging and discharging mode. This topology can also be applied to the impedance matching circuit of a high-power and high-frequency RF etching system. The target features of the proposed circuit topology are investigated via simulation and experiment. Voltage stress on the switch of the EVC circuit is successfully reduced by more than 40%.

격자 구조 회선 교환망에서의 호 차단 확률 및 Link Failure Model에 근거한 신뢰도 성능 분석 (Performance Analysis of Reliability Based On Call Blocking Probability And Link Failure Model in Grid Topology Circuit Switched Networks)

  • 이상준;박찬열
    • 한국컴퓨터정보학회논문지
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    • 제1권1호
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    • pp.25-36
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    • 1996
  • 본 논문은 격자 구조 회선 교환 망에서 발생할 수 있는 호 차단 확률 및 failure model을 설정하여 신뢰도를 분석하였다 특히 failure model에서는 link failure 모델을 고려하였다. 대상 모델은.flooding search routing 방식을 사용하여 패킷을 통화 대상자 노드에 전송하였다. 이때. 각 링크failure는 독립적이라고 가정하였다. 이와 같은 failure모델의 성능을 평가하기 위한 방법으로서 joint probability를 이용하여 소규모 격자 구조 회선 교환망의 신뢰도를 분석해 보았으며. 이를 시뮬레이션 한 값과 비교해 보았다 또한. 통신망에서 주요한 성능 지표중 하나8! 호 차단 확률을 구하여 회선망의 신뢰도를 평가하였다.

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보호 계전기와 차단기의 동작 순서를 고려한 전력 시스템 사고 구간 진단을 위한 전문가 시스템 (An Expert System for Fault Section Diagnosis in Power Systems using the information including operating times of actuated relays and tripped circuit breakers)

  • 민상원;이상호;박종근
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 A
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    • pp.125-127
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    • 2000
  • Multiple faults are hard to diagnose correctly because the operation of circuit breakers tripped by former fault changes the topology of power systems. The information including operating time of actuated relays and tripped circuit breakers is used for considering changes of the network topology in fault section diagnosis. This paper presents a method for fault section diagnosis using a set of matrices which represent changes of the network topology due to operation of circuit breakers. The proposed method uses fuzzy relation to cope with the unavoidable uncertainties imposed on fault section diagnosis of power systems. The inference executed by the proposed matrices provides the fault section candidates in the form of a matrix made up of the degree of membership. Experimental studies for real power systems reveal usefulness of the proposed technique to diagnose multiple faults.

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CMOS 능동 인덕터를 이용한 동조가능 저잡음 증폭기의 잡음성능 향상에 관한 연구 (Study on Noise Performance Enhancement of Tunable Low Noise Amplifier Using CMOS Active Inductor)

  • 성영규;윤경식
    • 한국정보통신학회논문지
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    • 제15권4호
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    • pp.897-904
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    • 2011
  • 본 논문에서는 CMOS 능동 인덕터를 이용하여 1.8GHz PCS 대역과 2.4GHz WLAN 대역에서 동조가 가능한 저잡음 증폭기의 새로운 회로구조를 제안하였다. CMOS 능동 인덕터 부하를 이용하는 저잡음 증폭기의 높은 잡음지수를 줄이기 위한 회로구조와 잡음지수를 더욱 감소시키기 위한 잡음상쇄기법을 적용하고 해석하였다. 이 동조가능 저잡음 증폭기를 $0.18{\mu}m$ CMOS 공정기술로 시뮬레이션을 수행한 결과는 잡음성능이 약 3.4dB 향상된 것을 보여주며, 이는 주로 제안된 새로운 회로구조에 기인한다.

누설집중형 변압기를 이용한 전계결합형 무선전력전송 시스템의 부피저감 최적설계 연구 (Optimal Design of Volume Reduction for Capacitive-coupled Wireless Power Transfer System using Leakage-enhanced Transformer)

  • 최희수;정채호;최성진
    • 전력전자학회논문지
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    • 제22권6호
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    • pp.469-475
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    • 2017
  • Using impedance matching techniques as a way to increase system power transferability in capacitive wireless power transmission has been widely investigated in conventional studies. However, these techniques tend to increase the circuit volume and thus counterbalance the advantage of the simplicity in the energy link structure. In this paper, a compact circuit topology with one leakage-enhanced transformer is proposed in order to minimize the circuit volume for the capacitive power transfer system. This topology achieves a reactive compensation, and the system quality factor value can be reduced by the turn ratio. As a result, this topology not only reduces the overall system volume but also minimizes the voltage stress of the link capacitor. An optimal design guideline for the leakage-enhanced transformer is also presented. The advantages of the proposed scheme over the conventional method in terms of power efficiency and circuit volume are revealed through an analytic comparison. The feasibility of applying the new topology is also verified by conducting 50 W hardware tests.

교차 자속을 이용한 새로운 플라이백 컨버터 (A New Flyback Converter Using the Cross Flux of Transformer)

  • 구복재;김효선;박성준;박성미
    • 조명전기설비학회논문지
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    • 제28권9호
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    • pp.73-82
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    • 2014
  • This research proposes a new type of flyback converter topology based on magnetic circuit sharing. The proposed flyback topology uses a transformer involving shared magnetic flux, and its characteristic is magnetic flux cancelation by cross magnetic flux in the magnetic flux-sharing part of the core. The new topology aims to reduce the volume of transformer by reducing the cross section of the core. Compared to conventional converters using only 1 transformer, its circuit configuration involving the serial input and parallel output of 2 flyback coils allowed increased converter insulation strength. In addition, the adoption of interleaved switching method achieved the improvement of output voltage ripple, while magnetic circuit sharing reduced by 50% the cross section of core where magnetic circuit was shared.

Protection of the MMCs of HVDC Transmission Systems against DC Short-Circuit Faults

  • Nguyen, Thanh Hai;Lee, Dong-Choon
    • Journal of Power Electronics
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    • 제17권1호
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    • pp.242-252
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    • 2017
  • This paper deals with the blocking of DC-fault current during DC cable short-circuit conditions in HVDC (High-Voltage DC) transmission systems utilizing Modular Multilevel Converters (MMCs), where a new SubModule (SM) topology circuit for the MMC is proposed. In this SM circuit, an additional Insulated-Gate Bipolar Translator (IGBT) is required to be connected at the output terminal of a conventional SM with a half-bridge structure, hereafter referred to as HBSM, where the anti-parallel diodes of additional IGBTs are used to block current from the grid to the DC-link side. Compared with the existing MMCs based on full-bridge (FB) SMs, the hybrid topologies of HBSM and FBSM, and the clamp-double SMs, the proposed topology offers a lower cost and lower power loss while the fault current blocking capability in the DC short-circuit conditions is still provided. The effectiveness of the proposed topology has been validated by simulation results obtained from a 300-kV 300-MW HVDC transmission system and experimental results from a down-scaled HVDC system in the laboratory.

성층권 드론에 적용할 멀티레벨 인버터 회로 분석 및 경량화 분석 (Multi-Level Inverter Circuit Analysis and Weight Reduction Analysis to Stratospheric Drones)

  • 황광복;박희문;전향식;이정환;박진현
    • 한국산업융합학회 논문집
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    • 제26권5호
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    • pp.953-965
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    • 2023
  • The stratospheric drones are developed to perform missions such as weather observation, communication relay, surveillance, and reconnaissance at 18km to 20km, where climate change is minimal and there is no worry about a collision with aircraft. It uses solar panels for daytime flights and energy stored in batteries for night flights, providing many advantages over existing satellites. The electrical and power systems essential for stratospheric drone flight must ensure reliability, efficiency, and lightness by selecting the optimal circuit topology. Therefore, it is necessary to analyze the circuit topology of various types of multi-level inverters with high redundancy that can ensure the reliability and efficiency of the motor driving power required for stable long-term flight of stratospheric drones. By quantifying the switch element voltage drop and the number and weight of inverter components for each topology, we evaluate efficiency and lightness and propose the most suitable circuit topology for stratospheric drones.