• Title/Summary/Keyword: Circuit testing

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Yoke Tube Crack Inspection by Using Acoustic Resonance Spectral Analysis (음향 공진 스펙트럼 분석을 통한 요크 튜브 크랙 검사)

  • Yeom, Woo-Jung;Hong, Yeon-Chan;Kim, Jin-Young;Kang, Joonhee
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.10
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    • pp.108-114
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    • 2018
  • Due to the development of nondestructive testing techniques, methods of inspecting cracks in mechanical parts have drawn attentions. Among various non-destructive testing methods the acoustic resonance method which analyzes the natural frequencies has been developed into a technique suitable for the prompt judgements of the existence of the defects in the mechanical parts. In this study, we investigated the crack inspection technique to examine the cracks in the yoke tubes by using the acoustic resonance method and realized the system to quickly detect the cracks. A 24bit ADC circuit and an MCU were installed for the smooth data collection, and a TCP / IP communication interface was configured for the data communication with PC. We used a microphone as a sensor measuring the vibrations. We constructed an analysis software to obtain the frequency spectra of the vibrations, to find the existence of the cracks, and to feedback to the user. Tests were conducted using the yoke tubes manufactured in the real industrial field. The tests were successfully conducted to distinguish the good products from the defective (cracked) products and confirmed that they can be employed in the actual industrial field.

Design Technology of the Wideband Power Amplifier for Electromagnetic Susceptibility Measurement (EMS 측정용 광대역 전력 증폭기 설계기술에 관한 연구)

  • 조광윤;류근관;홍의석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.8B
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    • pp.1464-1471
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    • 1999
  • A wide-band high power amplifier to use for radiated electromagnetic field immunity testing of EMS(Electromagnetic Susceptibility) standards has to meet IEC1000-4-3 specification in the frequency bandwidth of 80MHz to 1000MHz. The power amplifier to be described in this paper consists of driving and power stages with wide-band matched circuits by estimated impedances. The mismatching protection circuit is inserted in it to prevent from damage of power device when the output port of power amplifier is opened or shorted by user's mistake. The characteristics of the power amplifier are obtained output power over 100watts, gain over 40dB and flatness of $\pm$0.3dB in the frequency range of 80 ~300MHz. The harmonics suppression characteristics is measured over 20dBc. This wide-band high power amplifier can be useful fur radiated electromagnetic field immunity testing of IEC 1000-4-3 standard.

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A Study on IEEE 1149.1 TAP Test Methodology for Minimum Area Overhead (최소 오버헤드를 갖는 IEEE 1149.1 TAP 테스트 기법에 관한 연구)

  • 김문준;장훈
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.11
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    • pp.61-68
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    • 2004
  • Today almost all chips have IEEE 1149.1 tap controller inside. Recently the circuit is embedded in the chips for other functional objectives. Hence a CED technique for testing and monitoring the IEEE 1149.1 tap controller had been proposed. This paper studies the optimal CED test technique on the IEEE 1149.1 tap controller. There are duplication, parity prediction, and hybrid techniques. The hybrid technique shows the best result on the area overhead. This means that the hybrid technique is perfectly adequate for the IEEE 1149.1 tap controller to be applied to test with the optimal area overhead and can be used widely in the field. Furthermore, we made more reduction from the previous method resulting in less area overhead.

Development of Eddy Current Test Probe for Profilometry Inspection of Tube (원형튜브 단면형상검사용 와전류탐촉자 개발)

  • Lee, H.J.;Nam, M.W.;Lee, C.H.
    • Journal of the Korean Society for Nondestructive Testing
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    • v.17 no.4
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    • pp.262-269
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    • 1997
  • An eddy current probe ($8{\times}1$ multiple-element, surface scan) was successfully designed and fabricated at the KEPRI using the impedance equivalent circuit theory. The probe is intended for the detection of circumferential deformations (cross-section view) of the heat exchanger tubing that can occur due to corrosion, erosion, and denting. Optimum design parameters providing the highest sensitivity and signal-to-noise ratio, such as the coil dimensions, electrical characteristics, and test frequencies, were determined based on initial laboratory experiments conducted on the test specimen (SS304 tubing: OD : 9.68mm, wall-thickness : 0.47mm) containing artificial flaws (e.g., dents and corroded surface on tube OD) using the available Zetec-made probe. Using this parameters, a new probe was made and tested on an unknown specimen. The result indicated that the new probe is capable of detecting the circumferential deformation with the error of ${\pm}0.2%$ (0.022mm) of the tube O.D.

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A Design of FPGA Self-test Circuit Reusing FPGA Boundary Scan Chain (FPGA 경계 스캔 체인을 재활용한 FPGA 자가 테스트 회로 설계)

  • Yoon, Hyunsik;Kang, Taegeun;Yi, Hyunbean
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.6
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    • pp.70-76
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    • 2015
  • This paper introduces an FPGA self-test architecture reusing FPGA boundary scan chain as self-test circuits. An FPGA boundary scan cell is two or three times bigger than a normal boundary scan cell because it is used for configuring the function of input/output pins functions as well as testing and debugging. Accordingly, we analyze the architecture of an FPGA boundary scan cell in detail and design a set of built-in self-test (BIST) circuits in which FPGA boundary scan chain and a small amount of FPGA logic elements. By reusing FPGA boundary scan chain for self-test, we can reduce area overhead and perform a processor based on-board FPGA testing/monitoring. Experimental results show the area overhead comparison and simulation results.

A New Test Algorithm for Bit-Line Sensitive Faults in High-Density Memories (고집적 메모리에서 BLSFs(Bit-Line Sensitive Faults)를 위한 새로운 테스트 알고리즘)

  • Kang, Dong-Chual;Cho, Sang-Bock
    • Journal of IKEEE
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    • v.5 no.1 s.8
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    • pp.43-51
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    • 2001
  • As the density of memories increases, unwanted interference between cells and coupling noise between bit-lines are increased. And testing high-density memories for a high degree of fault coverage can require either a relatively large number of test vectors or a significant amount of additional test circuitry. So far, conventional test algorithms have focused on faults between neighborhood cells, not neighborhood bit-lines. In this paper, a new test algorithm for neighborhood bit-line sensitive faults (NBLSFs) based on the NPSFs(Neighborhood Pattern Sensitive Faults) is proposed. And the proposed algorithm does not require any additional circuit. Instead of the conventional five-cell or nine-cell physical neighborhood layouts to test memory cells, a three-cell layout which is minimum size for NBLSFs detection is used. Furthermore, to consider faults by maximum coupling noise by neighborhood bit-lines, we added refresh operation after write operation in the test procedure(i.e.,$write{\rightarrow}\;refresh{\rightarrow}\;read$). Also, we show that the proposed algorithm can detect stuck-at faults, transition faults, coupling faults, conventional pattern sensitive faults, and neighborhood bit-line sensitive faults.

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Design of Tester Apparatus for 48 Channel GM Tube Sensor (48개 채널의 GM Tube 센서 테스터 장치의 설계)

  • Lee, Hee-Yeol;Lee, Joo-Hyun;Lee, Seung-Ho
    • Journal of IKEEE
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    • v.20 no.3
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    • pp.310-313
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    • 2016
  • In this paper, we propose the tester apparatus for 48 channel GM Tube sensor. The proposed apparatus can test up to 48 channel GM tube simultaneously to detect the defect and analyze the sensor characteristic. 300-1000V variable high voltage generation circuit is utilized for the apparatus suitable for the sensor characteristic. Thus, the proposed system is useful for various GM Tube sensor characteristic analysis. Multiple sensor testing environment is established for the early detection of the defect and the analysis to reduce the costs for manufacturing and rework. Developed 48 channel GM Tube sensor test is evaluated with certified testing equipment and shows excellent performance with respect to the uncertainty of the sensor test results.

A Study on the Development and Testing of Ringer Injection IoT System (링거 주입 IoT 시스템 개발 및 시험에 관한 연구)

  • Cho, Chung-Ho
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.4
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    • pp.787-796
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    • 2019
  • In this paper, we propose the design and test measure of Ringer injection IoT system for controling the ringer injection status and notifying the server system of the collected status informations such as the completion of injection, the remaining liquid, the injection status, and the emergency alarming of the urgent patients. We design the circuit diagrams composed of linger injection sensors, switches, status indicators, wireless communication functionalities, and propose the controlling and monitoring algorithms for sensing the linger injection status and notifying the collected status informations to a server system. Furthermore, we derive the testing criteria, such as linger liquid sensing time, sensing distance, operating temperature, input power, power consumption, and wireless communication speed, and analyze the test results.

Design of PMOS-Diode Type eFuse OTP Memory IP (PMOS-다이오드 형태의 eFuse OTP IP 설계)

  • Kim, Young-Hee;Jin, Hongzhou;Ha, Yoon-Gyu;Ha, Pan-Bong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.64-71
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    • 2020
  • eFuse OTP memory IP is required to trim the analog circuit of the gate driving chip of the power semiconductor device. Conventional NMOS diode-type eFuse OTP memory cells have a small cell size, but require one more deep N-well (DNW) mask. In this paper, we propose a small PMOS-diode type eFuse OTP memory cell without the need for additional processing in the CMOS process. The proposed PMOS-diode type eFuse OTP memory cell is composed of a PMOS transistor formed in the N-WELL and an eFuse link, which is a memory element and uses a pn junction diode parasitic in the PMOS transistor. A core driving circuit for driving the array of PMOS diode-type eFuse memory cells is proposed, and the SPICE simulation results show that the proposed core circuit can be used to sense post-program resistance of 61㏀. The layout sizes of PMOS-diode type eFuse OTP memory cell and 512b eFuse OTP memory IP designed using 0.13㎛ BCD process are 3.475㎛ × 4.21㎛ (= 14.62975㎛2) and 119.315㎛ × 341.95㎛ (= 0.0408mm2), respectively. After testing at the wafer level, it was confirmed that it was normally programmed.

A Study of the Exclusive Embedded A/D Converter Using the Microprocessor and the Noise Decrease for the Magnetic Camera (마이크로프로세서를 이용한 자기카메라 전용 임베디드형 AD 변환기 및 잡음 감소에 관한 연구)

  • Lee, Jin-Yi;Hwang, Ji-Seong;Song, Ha-Ryong
    • Journal of the Korean Society for Nondestructive Testing
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    • v.26 no.2
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    • pp.99-107
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    • 2006
  • Magnetic nondestructive testing is very useful far detecting a crack on the surface or near of the surface of the ferromagnetic materials. The distribution of the magnetic flux leakage (DMFL) on a specimen has to be obtained quantitatively to evaluate the crack. The magnetic camera is proposed to obtain the DMFL at the large lift-off. The magnetic camera consists of a magnetic source, magnetic lens, analog to digital converters (ADCs), interface, and computer. The magnetic leakage fields or the distorted magnetic fields from the object, which are concentrated on the magnetic lens, are converted to analog electrical signals tv arrayed small magnetic sensors. These analog signals are converted to digital signals by the ADCs, and are stored, imaged, and processed by the interface and computer. However the magnetic camera has limitations with respect to converting and switching speed, full range and resolution, direct memory access (DMA), temporary storage speed and volume because common ADCs were used. Improved techniques, such as those that introduce the operational amplifier (OP-Amp), amplify the signal, reduce the connection line, and use the low pass filter (LPF) to increase the signal to noise ratio are necessary. This paper proposes the exclusive embedded ADC including OP-Amp, LPF, microprocessor and DMA circuit for the magnetic camera to satisfy the conditions mentioned above.