• Title/Summary/Keyword: Circuit testing

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The time domain testing technique of RFIC based on specifications (설계사양기반 RF 집적회로의 시간영역 테스팅 기법)

  • Han Seok-Bung;Baek Han-Suk;Kim Kang-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.5 s.347
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    • pp.34-47
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    • 2006
  • In this paper, a new testing technique for core components of wireless transceiver was proposed. That was, band fault models (including the information of specifications in the analogue and RF IC) and methods which can test specifications in the time domain easily by observing a variation of band fault models in the circuit output were proposed and developed. This technique had an advantage over testing technique in frequency domain because it didn't need expensive test equipments and could reduce the time required. Test technique proposed in this paper was adapted to the test of 5.25 GHz low noise amplifier and proved that this testing technique was efficient in RF IC including low noise amplifier.

Magnetic field distribution in steel objects with different properties of hardened layer

  • Byzov, A.V.;Ksenofontov, D.G.;Kostin, V.N.;Vasilenko, O.N.
    • Advances in Computational Design
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    • v.7 no.1
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    • pp.57-68
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    • 2022
  • A simulation study of the distribution of magnetic flux induced by a U-shaped electromagnet into a two-layer massive object with variations in the depth and properties of the surface layer has been carried out. It has been established that the hardened surface layer "pushes" the magnetic flux into the bulk of the magnetized object and the magnetic flux penetration depth monotonically increases with increasing thickness of the hardened layer. A change in the thickness and magnetic properties of the surface layer leads to a redistribution of magnetic fluxes passing between the poles of the electromagnet along with the layer and the bulk of the steel object. In this case, the change in the layer thickness significantly affects the magnitude of the tangential component of the field on the surface of the object in the interpolar space, and the change in the properties of the layer affects the magnitude of the magnetic flux in the magnetic "transducer-object" circuit. This difference in magnetic parameters can be used for selective testing of the surface hardening quality. It has been shown that the hardened layer pushes the magnetic flux into the depth of the magnetized object. The nominal depth of penetration of the flow monotonically increases with an increase in the thickness of the hardened layer.

Analytic Estimation of Interrupting capability on contact system in MCCB (배선용 차단기(MCCB) 차단성능 평가해석 기법)

  • Choi, Y.K.;Chong, J.K.;Kim, I.Y.;Park, I.H.;Hwang, G.C.;Lee, K.S.
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.628-632
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    • 2002
  • Low voltage circuit breakers which interrupt rapidly and raise the reliability of power supply are widly used in power distribution systems. In the paper, it was investigated how much Interrupting capability was improved by correcting the shape of the contact system in molded case circuit breaker(below MCCB), especially arc runner. Prior to the interrupting testing, it was necessary for the optimum design to analyze electromagnetic forces on the contact system, generated by current and flux density. This paper presents both our compuational analysis and test results on contact system in MCCB

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HY Simplified Synthetic Test Facility (한양대학교 간이차단 합성시험설비구축)

  • Chang, Yong-Moo;Hwang, Ryul;Kim, Cheol-Ho;Lee, Bang-Wook;Koo, Ja-Yoon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.220-220
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    • 2009
  • We are developing of the evaluation technique and system for testing the performance of circuit breaker using Simplified Synthetic circuit. This facility specification is up to 90[kApeak] and up to 300[kVpeak]. It is possible to verify the interrupting capability by using low-energy and reduce the development period and the cost.

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Novel Testing Method of CMOS Operation Amplifier using Offset Voltage (오프셋 전압을 이용한 CMOS 연산 증폭기의 새로운 테스팅 기법)

  • 한석붕;윤원효
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.507-510
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    • 1998
  • In this paper, a novel test method is proposed to detect hard and soft fault in CMOS operational amplifiers. Proposed test method mark use of the offset character, which is one of the op-amps characteristics. During the test mode, CUT is implemented to unit gain op-amps with feedback loop. When the input is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage exceeding predefined range of tolerance. Using the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time is reduced. The accuracy and effectiveness of the method is verified through HSPICE simulation.

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A Study On The Application Of Active Power Factor Correction Circuit In Inverter Airconditioner (인버터에어컨에 능동역률개선회로 적용에 관한 연구)

  • Kim, Tae-Duk;Bae, Young-Dawn;Park, Yoon-Ser
    • Proceedings of the KIEE Conference
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    • 1996.07a
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    • pp.306-308
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    • 1996
  • The demands of minimizing the reactive power and reducing the current harmonics are increasing nowdays. The inverter airconditioner needs high inductive power and it operates with wide load ranges. Conventionally, an huge LC passive filter is used in airconditioner to improve the power factor and to reduce current harmonics which doesn't give good results. In this paper, a design of active power factor correction(APFC)circuit for inverter airconditioner is described. To improve the P.F and reduce the current THD, average current controlled APFC is designed and tested. The problems of APFC implementation, their solution and testing results are described.

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A Research on Dielectric Characteristics of Small Current Interruption Considering Pre-Condition Test for Puffer Type Circuit Breaker (Pre-Condition 시험을 고려한 Puffer식 차단기의 진상소전류 차단성능에 관한 연구)

  • Ahn, Heui-Sub;Yoon, Jeong-Hoon;Lee, Jong-Chul;Choi, Jong-Ung;Oh, Il-Sung;Lee, Sung-Ho
    • Proceedings of the KIEE Conference
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    • 2003.10b
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    • pp.12-14
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    • 2003
  • This paper presents the small current interruption capability of $SF_6$ puffer circuit breaker considering pre-condition. Firstly, the change of dielectric strength of the 3 breakers was compared with testing breakers as clean contacts and eroded contacts after 3 shots of 760 according to new IEC 62271-100 standard. Also the dielectric strength curve of each model was calculated through flow and electric field simulations. From these results, we could modify the empirical equation, being used to predict the dielectric strength of small current interruption capability, considering the effects of pre-condition.

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Logic Circuit Fault Models Detectable by Neural Network Diagnosis

  • Tatsumi, Hisayuki;Murai, Yasuyuki;Tsuji, Hiroyuki;Tokumasu, Shinji;Miyakawa, Masahiro
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2003.09a
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    • pp.154-157
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    • 2003
  • In order for testing faults of combinatorial logic circuit, the authors have developed a new diagnosis method: "Neural Network (NN) fault diagnosis", based on fm error back propagation functions. This method has proved the capability to test gate faults of wider range including so called SSA (single stuck-at) faults, without assuming neither any set of test data nor diagnosis dictionaries. In this paper, it is further shown that what kind of fault models can be detected in the NN fault diagnosis, and the simply modified one can extend to test delay faults, e.g. logic hazard as long as the delays are confined to those due to gates, not to signal lines.

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Resonant capacitor with separate4 Induction heating system (공진 콘덴서 분할형 유도가열 전원장치)

  • Lee, B.S.;Min, B.J.;Kim, D.H.;Ro, C.C.;Jung, S.K.;Lee, B.K.
    • Proceedings of the KIEE Conference
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    • 1994.07a
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    • pp.502-504
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    • 1994
  • This paper describes an induction heating system which is full-bridge parallels resonant inverter. This system consists of current-fed type inverter, and a parallels resonant circuit with a matching transformer. A parallels resonant scheme is employed, and operating range of the proposed circuit with operating frequency and load parameter is demonstrated from the result of steady state. Also, this equipments testing result introduces, good efficiency and reliability of the system. Finally, this paper experimental results are given.

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Derating design approach of aluminum electrolytic capacitor for reliability improvement (알루미늄 전해 커패시터의 신뢰성 향상을 위한 Derating 설계 연구)

  • Min, Dae-June;Kim, Jae-Jung;Son, Young-Kap;Chang, Seog-Weon;Kwack, Kae-Dal
    • Proceedings of the KSME Conference
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    • 2007.05a
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    • pp.1712-1717
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    • 2007
  • This paper presents a derating design approach for reliability improvement of an aluminum electrolytic capacitor. The capacitor, usually mounted in a printed circuit board, is used to stabilize the circuit. The main failure mechanism of interest is dry-up of the electrolyte that is mainly caused by two stresses-temperature and voltage. The lifetime under these stresses is modeled as a function of these stresses and time using accelerated life testing. Quantitative variation in the lifetime, according to variations in these stresses, is investigated to perform the derating design of the capacitor so that the stress levels are selected to achieve required reliability measures for reliability improvement. Moreover, sensitivity analysis shows which stress would be a more important factor determining the lifetime.

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