• 전자공학회논문지A
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• 제33A권3호
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• pp.176-186
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• 1996

As the density of VLSI increases, the conventional logic testing is not sufficient to completely detect the new faults generated in design and fabrication processing. Recently, IDDQ testing becomes very attractive since it can overcome the limitations of logic testing. In this paper, G-ATPG (gyeongsang automatic test pattern genrator) is designed which is able to be adapted to IDDQ testing for combinational CMOS VLSI. In G-ATPG, stuck-at, transistor stuck-on, GOS (gate oxide short)or bridging faults which can occur within priitive gate or XOR is modelled to primitive fault patterns and the concept of a fault-sensitizing gate is used to simulate only gates that need to sensitize the faulty gate because IDDQ test does not require the process of fault propagation. Primitive fault patterns are graded to reduce CPU time for the gates in a circuit whenever a test pattern is generated. the simulation results in bench mark circuits show that CPU time and fault coverage are enhanced more than the conventional ATPG using IDDQ test.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 A
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• pp.543-545
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• 2003

한류형 전력퓨즈는 계통의 단락사고로 고장 전류가 흐를 때 퓨즈내부에서 발생하는 저항에 의해 고장전류를 회로 고유의 단락전류보다 아주 적은 값으로 제한하고 최소 시간내에 차단하여 회로를 보호하므로 계통기기의 단락용량를 최소한으로 감소시킬 수 있다. 본 논문에서는 이러한 한류형 전력퓨즈의 단락전류 차단성능 평가를 위해 동작책무에 따른 차단성능을 규명하고자 단락발전기를 사용하여 단락전류차단시험을 실시하고 그 결과를 제시하였으며, 또한 차단과정에 따른 스트레스들이 단락시험 시 차단성능에 미치는 영향을 다루고 있다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 A
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• pp.540-542
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• 2003

In the high-power tests to be performed on electrical apparatus as circuit-breaker, load switch, fuse, transformers, insulators, cable and so on, the results of tests on these apparatus are extremely important to evaluate the performance of test object. The reliability of the results depends on the reliability of measuring systems used in the laboratories where tests are performed. This paper deals with factors of uncertainty and describes estimation of uncertainty in new measuring system used in high-power testing LAB. 1 in KERI.

• Journal of Power Electronics
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• 제8권3호
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• pp.217-227
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• 2008

The electric power subsystems (EPS) of most remote sensing satellites consist of a solar array as a source of energy, a storage battery, a power management and control (PMC) unit and a charge equalization unit (CEU) for the storage battery. The PMC and CEU use high frequency transformers in their power modules. This paper presents a design, implementation and testing results of a high frequency transformer for the EPS of satellite applications. Two approaches are used in the design process of the transformer based on the pre-determined transformer specifications. The transformer is designed based on an ETD 29 ferrite core. The implemented transformer consists of one center-tapped primary coil with eleven center-tapped secondary coils. The offline calculation results and measured values of R, L for transformer coils are convergence. A test circuit for measuring the transformer parameters like voltage, current and B-H hysteresis was implemented and applied. The test results confirm that the voltage waveforms of both primary and secondary coils were as desired. No overlapping occurred between the control signal and the transformer, which was not saturated during testing even during a short circuit test of the secondary channels. The dynamic B-H loop characteristics of the used transformer cores were measured. The sample test results are given in this paper.

• 조명전기설비학회논문지
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• 제26권7호
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• pp.16-22
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• 2012

With the increase of consumption of new renewable energy, the use of Electric Double Layer Capacitor(EDLC) is being gradually widened as the next generation energy storage device. In order to expand the market of EDLC which is recently receiving a lot of attraction as a new promising area, development of a charge/discharge cycle tester to measure and test performance, is essential. Therefore, this research designed a circuit to measure capacity and internal resistance and a circuit to measure voltage maintenance properties, based on EDLC's basic charging/discharging properties so it is able to measure the state of charge and discharge at high speed. When evaluating performance characteristics, the 5[V]/100[A] prototype-EDLC charge/discharge testing system developed for this research showed ${\pm}0.1$[%] of accuracy of voltage and current measurement. It was also proved that the developed charge/discharge testing system for EDLC can be applied to the actual industry, when testing the entire system using a program produced for data monitoring and acquisition.

• 대한전자공학회논문지SD
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• 제40권1호
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• pp.72-79
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• 2003

회로의 설계기술, 공정기술의 발달로 회로의 복잡도가 증가하고 있으며 대용량 메모리의 수요도 급격하게 증가하고 있다. 이렇듯 메모리의 용량이 커질수록 테스트는 더더욱 어려워지고, 테스트에 소요되는 비용도 점차 증가하여 테스트가 칩 전체에서 차지하는 비중이 커지고 있다. 따라서 짧은 시간에 수율을 향상시킬 수 있는 효율적인 테스트 알고리즘에 대한 연구자 중요하게 여겨지고 있다. 본 논문에서는 단일 포트 메모리의 고장을 검출하는데 가장 보편적으르 사용되는 March C-알고리듬을 바탕으로 하여 이를 보완하고, 추가되는 테스트 길이 없이 단일 포트 메모리뿐만 아니라 이종 포트 메모리에서 발생할 수 있는 모든 종류의 고장이 고려되어 이종 포트 메모리에서도 적용 가능한 효과적인 테스트 알고리듬을 제안한다.

• 한국산학기술학회논문지
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• 제4권1호
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• pp.7-12
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• 2003

테스트용이도(testability)분석은 논리회로에서 발생하는 stuck-at고장을 테스트하는 것이 어느 정도 어려운가를 예측 평가하기 위한 목적에서 이루어진다. 좋은 테스트용이도 분석 프로그램이 있다면, 회로의 테스트용이도를 개선하기 위한 좋은 방안을 회로 설계자들에게 사전에 제시해줌으로써, 테스트 문제에 미리 대비할 수 있도록 해준다. 그 동안 테스트용이도 분석을 효율적으로 수행하기 위한 연구가 있었다. 그러나 COP이나 SCOAP과 같은 기존의 대표적인 테스프용이도 분석 알괴리즘들은 트리 구조를 갖는 회로의 경우에 각 stuck-at고장의 테스트용이도 값을 효율적으로 계산할 수 있으나, 일반적인 구조의 회로에 대해서는 정확도가 떨어진다. 그 이유는 테스트용이도 분석을 선형적인 시간 내에 수행하기 위해서 각 신호신들은 재수렴 팬아웃(reconvergent fanout)으로 인한 상관관계가 없는 것으로 가정하기 때문이다. 본 논문에서는 테스트용이도 분석을 위해 신호선 상관관계를 고려한 개선된 방법을 제안한다. 제안된 방법에서는, 회로 내에서 재수렴 팬아웃과 이에 경향을 받는 게이트들에 대한 정보를 사전에 파악하기 위한 재수렴 팬아웃 분석 알고리즘을 이용하여, 재수렴 팬아웃으로 인한 효과를 테스트용이도 분석에 반영함으로써 정확도를 높이고 있다.

• 한국신뢰성학회지:신뢰성응용연구
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• 제16권3호
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• pp.202-207
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• 2016

Purpose: The purpose of this study is main factors (environmental conditions, pattern spacing, pattern material) that effect the ion-migration of PCB. Methods: Recently, the electronic components are becoming more high density of electronic device, so that electronic circuits have smaller pitches between the patten and more vulnerable to insulation failure. so the reliability of electric insulation of device has become an ever important issue as device contact pitches of pattern. Usually, ion-migration occurs in high temperature and high humidity environment as voltage is applied to the circuit. Under high temperature and high humidity, voltage applied electronic components respond to applied voltages by metals's electrochemical ionization and a conducting filament forms between the anode and cathode across a nonmetallic medium. This leads to short-circuit failure of the electronic component. Results: we studied ion-migration that occurs in accordance with the main factors (environmental conditions, pitches, pattern material). The PCB pattern material was made by two different types of material (free solder, OSP) for this research and pitches of pattern is 0.15mm, 0.3mm, 0.5mm. PCB was experimented in the environmental conditions (high temperature $120^{\circ}C$, high temperature and high humidity $85^{\circ}C$, 85%RH) and was analyzed for ion-migration through the experiment results. Conclusion: We confirmed that environmental condition, pitches of pattern, pattern material had effect on ion-migration of PCB.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 A
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• pp.354-356
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• 2004

This paper is the transient analysis for choosing the optimal SCR ratings of AC3 utilization category testing equipment(AC3 TE) used for electrical durability test for magnetic switch according to IEC60947-4 Annex B by utilizing EMTP -ATPDraw. Magnetic contactor closes and opens the motor load with ON/OFF switch of electronic contactor. It is also used for protecting and controlling the load. Magnetic contactor detects the over-current flow in the load with a over-current relay and disconnects the load by opening its control power. The key cost of AC3 TE is the SCR ratings. The more decreases SCR ratings, the more decreased the cost is, but it is impossible to ensure the reliability. On the other hand, the more increases SCR ratings, the more increased the cost is. Thereupon, in this paper after the testing circuit is simulated by using EMTP-ATPDraw the SCR ratings will be applied in order to guarantee the testing reliability of PT&T(Power Testing and Technology institute in LG Industrial Systems Co.,Ltd.).

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 B
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• pp.705-706
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• 2006

Generally Short Circuit Test of transformers are tested according to IEEE std C57.12.00-2000, IEC 60076-5(2000-07), ES148(1998.6.26) or KS C4309(2003). But ES148(1998.6.26) is same as IEEE std C57. 12.00-2000 and KS C4309(2003) is revising coincidence with IEC 60076-5(2000-07). On this study condition of the transformers before short circuit test, calculation method for test current peak value, tolerance on the asymmetrical peak and r.m.s value, short circuit testing procedure, number of short circuit test, duration short circuit test, and detection of faults and evaluation of short circuit test result will be compared with ANSI and IEC.