• Journal of electromagnetic engineering and science
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• v.11 no.2
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• pp.122-127
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• 2011

A general analysis of an aperture-coupled vertically mounted strip antenna is presented to examine its circuit characteristics. Based on the present analysis, an equivalent circuit model is developed, and an analytic or semi-analytic evaluation of the related circuit element values is described. The effects of structure parameters on the antenna characteristics were studied with the developed equivalent circuit, and the design curves were obtained. To check the validity of the proposed analysis and design theory, two C-band antennas (5.0 GHz and 4.5 GHz) were designed and fabricated. Their computed characteristics, derived from the proposed network analysis, were compared with the measurement and simulation results. The error of the current model in predicting the operating center frequency was less than 0.50 %. In addition, the observed bandwidth was found to be comparable to the conventional microstrip antennas. All the results fully validated the efficiency and accuracy of the proposed analysis and network model.

• Progress in Superconductivity and Cryogenics
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• v.21 no.4
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• pp.39-43
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• 2019

The breaking of a circuit in DC grid could pose a challenge because of the absence of zero-crossing instant for both current and voltage when a fault occurs. An additional fault current limiting function will be very helpful for reducing the burden of the DC circuit breaker by limiting the fault current to a reasonable value. In this paper, we studied the overcurrent characteristics of several HTS conductors so that we could use the selected conductors for the basic design work of a resistive type fault current limiting module as a part of the circuit breaking system. According to the short-circuit test results, we suggested and compared two different basic design parameters of the HTS fault current limiting module, which will be connected in series to the DC circuit breaker.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.10
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• pp.1947-1953
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• 2009

Metal halide (MH) lamps have been largely used due to high luminous efficiency, good color rendering, and long life. Since the metal halide lamps have problems of high ignition voltage and acoustic resonance. Thus, the design of ballast is very difficult for engineers. This paper proposes prototype of electric ballast in order to solve above two problems. The proposed electric ballast is consisted of EMI filter, full wave rectifier circuit, active PFC, DBI(Dual Buck Inverter), dimming circuit and ignitor circuit. The DBI supplies both rectangular voltage and current to the lamp. As the result of the experiment, the acoustic resonance was eliminated and the ignitor circuit was designed to generate high ignition voltage than 5kV. It makes the dimming circuit possible to control the lamp power in range between 230W and 350W.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.638-641
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• 2001

Connectorless power transmission and supply are the power transfer device revealed by resonant inverter or transformer using inductant device. Recently, on power supply have been going on frequently, so several power supply circuit forms are announced. But Compared with the circuit of previous paper, instead of the circuit composed of a simple sylinder Ferrit, I was manufacture in a sylinder that It was a double overlab to a sylinder and I was followed a double flux in inner flux path. Above all, for practicalization, supply circuit operation character analysis and development of controller should be preceded. According to this paper, power transmission and supply analyze characters and design control circuit like the analysis of general resonant inverter for power transmission. They compose the circuit to get sinusoid wave output voltage using pulse width modulation control mode. For Supply, output wave form through power track and power pick-up of magnetic inductance includes ripper component. So I intend to design the controller including filter and regulator, compare analyze theoretical result with real measurement value and then show you their practicality

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.407-409
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• 2006

This paper presents the methods of designing the control circuits for a Class D amplifier to have a peak performance. The proposed approach is based on the three functional components - a carrier generator, a feedback circuit and a dead-time circuit. First the analog signal is applied to the controller, which outputs the 3 level PWM waveform. The controller used for this experiment is made of the operational amplifier and the logic circuit. The experimental results show that the control circuit performs with satisfaction and its output is proportional to input audio signal, providing a satisfactory 3 level PWM pattern. From this design methodology, by implementing a proposed control circuit we can achieve the efficient Class D amplifier using the half-bridge, full-bridge or push-pull topology at the output stage.

• Journal of IKEEE
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• v.25 no.2
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• pp.309-314
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• 2021

The proposed preamplifier for the static random access memory reduces the time required for the sense amplifier enable during the read operation by 55%, which leads to a significant speed up the total spped. This is attirbuted to the novel circuit techqniue that cancels out the transistor mismatch which is induced by the process variation. In addition, a selective enable circuit for preamplifier circuit is proposed, so the proposed preamplifier is enabled only when it is required. Accordingly the energy overhead is limited below 4.45%.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.909-912
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• 2005

According to miniaturization trend of rehabilitation medical equipment such as hearing aid, study to replace previous complex system with semiconductor SOC (System-on-Chip) chip becomes lively. In this study, after investigating of existent hearing aid performance in circuit design approach, low electric power consuming, single power supply (1.4V battery) CMOSS OP AMP was designed. Analog circuit design tools such as Hspice and Cadence were used for circuit simulation and implementing layout design. This study shows technical methods particularly for layout design. The work is done in pmos and nmos active element layout design in addition to passive element design such as resister, capacitor and inductor.

• Journal of Magnetics
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• v.19 no.4
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• pp.404-410
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• 2014

This paper considers the design and performance evaluation of interior permanent magnet synchronous motors (IPMSMs). The initial design such as the sizing and shape design of the stator and rotor is performed for a given load condition. In particular, the equivalent magnetic circuit (EMC) is employed both to design the mechanical parameters of the rotor while considering nonlinear magnetic saturation effect and to analyze the magnetic characteristics of the air-gap of the motor. The designed motor is manufactured and tested to confirm the validity of the design processes and simulated results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.4
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• pp.374-380
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• 2007

In this paper a nobel optimum design method is presented for a shield in a vacuum interrupter which is equipped in switchgear to improve its electric insulation capability. The design of Taguchi experiment method which is based on the results by finite element method is used to find optimum design conditions. The important design factors are chosen at first and the concept of signal to noise ratio is applied to evaluate the vacuum interrupter performance, and the optimal values of each parameters are determined. From the results of various analyses, it is shown that the shield plate in circuit circuit breaker compartment of switchgear can reduce the concentration of electric field intensity. This method is very useful to design the construction of a shield in a short time. Consequently, the insulation capability of circuit breaker compartment in a gas insulated switchgear is improved by adopting an additional optimized shaped shield.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.20-29
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• 1998

This paper proposes the algorithms that design the highly parallel multiple-valued logic curcuit and assign the code to each node of DCG(Directed Cyclic Graph) of length 1. The conventional Nakajima's algorithm have some problems, so this paper introduce the matrix equation from DCG of length 1 and proposes circuit design algorithms according to the DCG of length 1. Using the proposed circuit design algorithms in this paper, it become realized that was not able to design from Nakajima's algorithm. Also, making a comparision between the circuit design using Nakajima's algorithm and this paper's, we testify that proposed paper's algorithm is able to realize more optimized circuit design. According to proposed curcuit design algorithm in this paper, it is possible to design curcuit that DCG have natural number, so it have the following advantages; reduction of the curcuit input/output digits, simplification of curcuit composition, reduction of computation time and cost. And we show compatibility and verification about this paper's algorithm.