• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.8
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• pp.39-48
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• 2016

In this paper, we propose thermal resistance compact model of FinFET structure that has hexagon shaped source/drain. The heating effect and thermal properties were increased by reduced size of the device, and thermal resistance is an important factor to analyze the effect and the properties. The heat source and each contact that is moved heat out were set up in transistor, and domain is divided by the heat source and the four parts of contacts : source, drain, gate, substrate. Each contact thermal resistance model is subdivided as a easily interpretable structure by analyzing the temperature and heat flow of the TCAD simulation results. The domains are modeled based on an integration or conformal mapping method through the structure parameters according to its structure. First modeled by analyzing the thermal resistance to a single fin, and applying the change in the parameter of the channel increases to improve the accuracy of the thermal resistance model of the multi-fin/ finger. The proposed thermal resistance model was compared to the thermal resistance by analyzing results of the 3D Technology CAD simulations, and the proposed total thermal resistance model has an error of 3 % less in single and multi-finl. The proposed thermal resistance model can predict the thermal resistance due to the increase of the fin / finger, and the circuit characteristics can be improved by calculating the self-heating effect and thermal characterization.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.5
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• pp.635-643
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• 2018

This paper propose a method to identify the motor parameters and improve input voltage error which affect the low speed position error of the back-emf(back electromotive force) based sensorless algorithm and to secure the operation reliability and stability even in the case where the load fluctuation is severe and the start and low speed operation frequently occurs. In the model-based observer used in this paper, stator resistance, inductance, and input voltage are particularly influential factors on low speed performance. Stator resistance can cause resistance value fluctuation which may occur in mass production process, and fluctuation of resistance value due to heat generated during operation. The inductance is influenced by the fluctuation due to the manufacturing dispersion and at a low speed where the change of the current is severe. In order to find stator resistance and inductance which have different initial values and fluctuate during operation and have a large influence on sensorless performance at low speed, they are commonly measured through 2-point calculation method by 2-step align current injection. The effect of voltage error is minimized by offsetting the voltage error. In addition, when the command voltage is used, it is difficult to estimate the back-emf due to the relatively large distortion voltage due to the dead time and the voltage drop of the power device. In this paper, we propose a simple circuit and method to detect the voltage by measuring the PWM(Pulse Width Modulation) pulse width and compensate the voltage drop of the power device with the table, thereby minimizing the position error due to the exact estimation of the back-emf at low speed. The suitability of the proposed algorithm is verified through experiment.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.31-38
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• 2003

Among mitigation techniques for electric and magnetic field (EMF) from an overhead transmission line a passive loop is a way that can be cheap and easily installed on the existing towers and have a satisfactory effect as well. However current induced in the passive loop causes transmission power loss and the phase imbalance increases since geometrical asymmetry of the transmission lines becomes larger. So in order to evaluate the power loss and the phase imbalance due to a passive loop, this paper represent a 345[kV] 1-circuit flat type transmission line as asymmetrical 3-phase distributed parameter line model where the effect of a passive loop is embedded in the line parameters, and then formulates differential equations. By solving these equations voltages and currents of each phase at receiving end become known. We find out that power losses occur differently at each phase and positive sequence component decreases at receiving end while negative sequence component increase. In general phase imbalance due to a passive loop is slight, but it increases in proportional to the induced current and length of section where the passive loop is installed. Thus the phase imbalance should be included in terms of cost for introducing a passive loop.

• Journal of Bio-Environment Control
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• v.26 no.4
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• pp.258-267
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• 2017

The price competitiveness of photovoltaic system (PV system) has risen recently due to the growth of industries, however, it is rarely applied to the greenhouse compared to other renewable energy. In order to evaluate the application of PV system in the greenhouse, power generation and optimal installation area of PV panels should be analyzed. For this purpose, the prediction of the heating and cooling loads of the greenhouse is necessary at first. Therefore, periodic and maximum energy loads of a multi-span greenhouse were estimated using Building Energy Simulation(BES) and optimal installation area of PV panels was derived in this study. 5 parameter equivalent circuit model was applied to analyzed power generation of PV system under different installation angle and the optimal installation condition of the PV system was derived. As a result of the energy simulation, the average cooling load and heating load of the greenhouse were 627,516MJ and 1,652,050MJ respectively when the ventilation rate was $60AE{\cdot}hr^{-1}$. The highest electric power production of the PV system was generated when the installation angle was set to $30^{\circ}$. Also, adjustable PV system produced about 6% more electric power than the fixed PV system. Optimal installation area of the PV panels was derived with consideration of the estimated energy loads. As a result, optimal installation area of PV panels for fixed PV system and adjustable PV system were $521m^2$ and $494m^2$ respectively.

• Proceedings of the KSRS Conference
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• 2008.10a
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• pp.220-223
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• 2008

A camera system for the satellite application performs the mission of observation by measuring radiated light energy from the target on the earth. As a development stage of the system, the signal level analysis by estimating the number of electron collected in a pixel of an applied CCD is a basic tool for the performance analysis like SNR as well as the data path design of focal plane electronic. In this paper, two methods are presented for the calculation of the number of electrons for signal level analysis. One method is a quantitative assessment based on the CCD characteristics and design parameters of optical module of the system itself in which optical module works for concentrating the light energy onto the focal plane where CCD is located to convert light energy into electrical signal. The other method compares the design\ parameters of the system such as quantum efficiency, focal length and the aperture size of the optics in comparison with existing camera system in orbit. By this way, relative count of electrons to the existing camera system is estimated. The number of electrons, as signal level of the camera system, calculated by described methods is used to design input circuits of AD converter for interfacing the image signal coming from the CCD module in the focal plane electronics. This number is also used for the analysis of the signal level of the CCD output which is critical parameter to design data path between CCD and A/D converter. The FPE(Focal Plane Electronics) designer should decide whether the dividing-circuit is necessary or not between them from the analysis. If it is necessary, the optimized dividing factor of the level should be implemented. This paper describes the analysis of the electron count of a camera system for a satellite application and then of the signal level for the interface design between CCD and A/D converter using two methods. One is a quantitative assessment based on the design parameters of the camera system, the other method compares the design parameters in comparison with those of the existing camera system in orbit for relative counting of the electrons and the signal level estimation. Chapter 2 describes the radiometry of the camera system of a satellite application to show equations for electron counting, Chapter 3 describes a camera system briefly to explain the data flow of imagery information from CCD and Chapter 4 explains the two methods for the analysis of the number of electrons and the signal level. Then conclusion is made in chapter 5.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.62-62
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• 2008

As micro-system move toward higher speed and miniaturization, requirements for embedding the passive components into printed circuit boards (PCBs) grow consistently. They should be fabricated in smaller size with maintaining and even improving the overall performance. Miniaturization potential steps from the replacement of surface-mount components and the subsequent reduction of the required wiring-board real estate. Among the embedded passive components, capacitors are most widely studied because they are the major components in terms of size and number. Embedding of passive components such as capacitors into polymer-based PCB is becoming an important strategy for electronics miniaturization, device reliability, and manufacturing cost reduction Now days, the dielectric films deposited directly on the polymer substrate are also studied widely. The processing temperature below $200^{\circ}C$ is required for polymer substrates. For a low temperature deposition, bismuth-based pyrochlore materials are known as promising candidate for capacitor $B_2Mg_{2/3}Nb_{4/3}O_7$ ($B_2MN$) multi layers were deposited on Pt/$TiO_2/SiO_2$/Si substrates by radio frequency magnetron sputtering system at room temperature. The physical and structural properties of them are investigated by SEM, AFM, TEM, XPS. The dielectric properties of MIM structured capacitors were evaluated by impedance analyzer (Agilent HP4194A). The leakage current characteristics of MIM structured capacitor were measured by semiconductor parameter analysis (Agilent HP4145B). 200 nm-thick $B_2MN$ muti layer were deposited at room temperature had capacitance density about $1{\mu}F/cm^2$ at 100kHz, dissipation factor of < 1% and dielectric constant of > 100 at 100kHz.

• Animal Bioscience
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• v.36 no.1
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• pp.75-83
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• 2023

Objective: The objective of this study was to describe a methodological procedure to quantify the heat production (HP) partitioning in basal metabolism or fasting heat production (FHP), heat production due to physical activity (HPA), and the thermic effect of feeding (TEF) in roosters. Methods: Eighteen 54-wk-old Hy Line Brown roosters (2.916±0.15 kg) were allocated in an open-circuit chamber of respirometry for O₂ consumption (VO₂), CO₂ production (VCO₂), and physical activity (PA) measurements, under environmental comfort conditions, following the protocol: adaptation (3 d), ad libitum feeding (1 d), and fasting conditions (1 d). The Brouwer equation was used to calculate the HP from VO₂ and VCO₂. The plateau-FHP (parameter L) was estimated through the broken line model: HP = U×(R-t)×I+L; I = 1 if t<R or I = 0 if t>R; Where the broken-point (R) was assigned as the time (t) that defined the difference between a short and long fasting period, I is conditional, and U is the decreasing rate after the feed was withdrawn. The HP components description was characterized by three events: ad libitum feeding and short and long fasting periods. Linear regression was adjusted between physical activity (PA) and HP to determine the HPA and to estimate the standardized FHP (st-FHP) as the intercept of PA = 0. Results: The time when plateau-FHP was reached at 11.7 h after withdrawal feed, with a mean value of 386 kJ/kg^0.75/d, differing in 32 kJ from st-FHP (354 kJ/kg^0.75/d). The slope of HP per unit of PA was 4.52 kJ/mV. The total HP in roosters partitioned into the st-FHP, termal effect of feeding (TEF), and HPA was 56.6%, 25.7%, and 17.7%, respectively. Conclusion: The FHP represents the largest fraction of energy expenditure in roosters, followed by the TEF. Furthermore, the PA increased the variation of HP measurements.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.12C
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• pp.1288-1298
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• 2002

To implement elliptic curve cryptosystem in GF(2$\^$m/) at high speed, a fast divider is required. Although bit-parallel architecture is well suited for high speed division operations, elliptic curve cryptosystem requires large m(at least 163) to support a sufficient security. In other words, since the bit-parallel architecture has an area complexity of 0(m$\^$m/), it is not suited for this application. In this paper, we propose a new serial-in serial-out systolic array for computing division operations in GF(2$\^$m/) using the standard basis representation. Based on a modified version of tile binary extended greatest common divisor algorithm, we obtain a new data dependence graph and design an efficient bit-serial systolic divider. The proposed divider has 0(m) time complexity and 0(m) area complexity. If input data come in continuously, the proposed divider can produce division results at a rate of one per m clock cycles, after an initial delay of 5m-2 cycles. Analysis shows that the proposed divider provides a significant reduction in both chip area and computational delay time compared to previously proposed systolic dividers with the same I/O format. Since the proposed divider can perform division operations at high speed with the reduced chip area, it is well suited for division circuit of elliptic curve cryptosystem. Furthermore, since the proposed architecture does not restrict the choice of irreducible polynomial, and has a unidirectional data flow and regularity, it provides a high flexibility and scalability with respect to the field size m.

• Journal of the Korea Institute of Building Construction
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• v.22 no.6
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• pp.651-662
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• 2022

The electrochemical impedance spectroscopy(EIS) method was used to evaluate the concrete deterioration process related to chloride-induced steel corrosion with various corrosion levels(initiation, rust propagation and acceleration periods). The impressed current technique, with four total current levels of 0C, 13C, 65C and 130C, was used to accelerate steel corrosion in concrete cylinder samples with w/c ratio of 0.4, 0.5, and 0.6, immersed in a 0.5M NaCl solution. A series of EIS measurements was performed to monitor concrete deterioration during the accelerated corrosion test in this study. Some critical parameters of the equivalent circuit were obtained through the EIS analysis. It was observed that the charge transfer resistance(R_c) dropped sharply as the impressed current increased from 0C to 13C, indicating a value of approximately 10kΩcm². However, the sensitivity of R_c significantly decreased when the impressed current was further increased from 13C to 130C after corrosion of steel had been initiated. Meanwhile, the double-layer capacitance value(C_dl) linearly increased from 50×10^-6μF/cm² to 250×10^-6μF/cm² as the impressed current in creased from 0C to 130C. The results in this study showed that monitoring C_dl is an effective measurement parameter for evaluating the progress of internal concrete damages(de-bonding between steel and concrete, micro-cracks, and surface-breaking cracks) induced by steel corrosion. The findings of this study provide a fundamental basis for developing an embedded sensor and signal interpretation method for monitoring concrete deterioration due to steel corrosion at various corrosion levels.