• Proceedings of the KIEE Conference
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• 2002.06a
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• pp.38-40
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• 2002

In the case of conventional high frequency inverter, with damage of switch by surge voltage when switch gets into compulsion extinction by load accident and so on because reactor is connected by series to switch, or there was problem of conduction loss by reactor's resistivity component, Also, it has controversial point of that can not ignore conduction loss of switch in complete work kind action of soft switching. In this paper, as high frequency induction heating power supply, we propose half bridge type multi resonance soft switching high frequency inverter topology that can realize high amplitude operation of load current with controlling switch current by multiplex resonance, mitigating surge voltage when switch gets into compulsion extinction and to be complete operation of zero current switching by opposit parallel connected reactor to inverter switch. and do circuit analysis for choice of most suitable circuit parameter of circuit

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.79-80
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• 2005

In this paper, the circuit models of optical to electrical(O/E) characteristics of waveguide photodiode(WGPD) submodule are examined. Test structures of WGPD and WGPD submodule were fabricated and S21 parameter was measured to characterize the O/E conversion property. Valid circuit models were derived by RF circuit simulation and O/E characteristics were modeled to analyze the effects of model parameters on the WGPD submodule performances. Based on the results, it can be concluded that the suggested WGPD submodule model can explain the characteristics of the O/E conversion of WGPD submodule, where the parasitic components originated from ribbon bonding block crucially influence on the performance of WGPD submodule, are able to show more efficient property by making compact bonding structure. We propose an effective WGPD submodule bonding structure and it can ensure the 40Gbps operation of WGPD.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.6
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• pp.854-862
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• 1993

All of the CMOS analog and analog-digital systems have composed with several basic circuits, and among them, a important block, the amplifier part can affect the system's performance, Therefore, according to the uses in the system, the amplifier circuit have designed as various architectures (high-gain, low-noise, high-speed circuit, etc...). In this paper, we have proposed a new CMOS differential amplifier circuit. This circuit is differential to single ended input stage comprised of CMOS complementary gain circuits having internally biasing configurations. These architectures can be achieved the high gain and reduced the transistors for biasing. As a results of SPICE simulation with the standard $1.5{\mu}m$ processing parameter, the gain of the proposed circuit have a doubly value of the typical circuit's while maintaining other characteristics(phase margin, offset, etc...). And the proposed circuit is applicated in a simple CMOS comparator which has the settling time in 7nsec(CL=1pF) and the igh output swing $({\pm}4.5V)$.

• Journal of Electrical Engineering and Technology
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• v.10 no.1
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• pp.205-215
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• 2015

Common mode (CM) conducted interference are predicted and compared with experiments in a motor drive system of Electric vehicles in this study. The prediction model considers each part as an equivalent circuit model which is represented by lumped parameters and proposes the parameter extraction method. For the modeling of the inverter, a concentrated and equivalent method is used to process synthetically the CM interference source and the stray capacitance. For the parameter extraction in the power line model, a computation method that combines analytical method and finite element method is used. The modeling of the motor is based on measured date of the impedance and vector fitting technique. It is shown that the parasitic currents and interference voltage in the system can be simulated in the different parts of the prediction model in the conducted frequency range (150 kHz-30 MHz). Experiments have successfully confirmed that the approach is effective.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.815-818
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• 1998

The Insulated Gate Bipolar Transistor has the characteristics of MOSFET and BJT. The characteristics of proposed device exhibit high speed switching, the voltage controlled property, and the low ON resistance. This hybrid device has been used and developed continuously in the power electronic engineering field. We can simulate many IGBT circuits, such as the motor drive circuit, the switching circuits etc, with PSpice. However, some problems in PSpice is that the IGBT is old-fashioned and is very difficult to get it. In this paper, the IGBT in PSpice is considered as the basic structure. We changed the valuse of base width, gate-drain overlaping area, device area, and doping concentration, then calculated MOS transconductance, ambipolar recombination lifetime etc. Using this resultant parameter, we could predict the transient response characteristicsof IGBT, for examplex, voltage overshoot, the rising curve of voltage, and the falling curve of current.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.1
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• pp.105-114
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• 2004

In this paper, we design the circuits for DC parameter test of semiconductor devices. The DC parameter tester is the system which inspects the DC parameters of semiconductor devices. In the designed circuits, voltage(current) forcing current(voltage) sensing methods are used to inspect the parameters. The designed circuits are simulated by OR-CAD. The simulation results have good performance.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.4
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• pp.151-157
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• 2001

This paper presents an identification method of parameters of induction motor which is driven by PWM voltage inverter. The method uses least square estimation based on the step voltage input and current response. Utilizing the fact that ratio of two characteristic roots is large in the induction motor circuit, we derived two 1st-order difference equations for direct computation of parameter values. experimental results are compared with conventional motor test results to demonstrate that the proposed method is capable of estimating parameters of induction motor at standstill.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.485-489
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• 2015

An accurate large-signal BSIM4 macro model including new empirical bias-dependent equations of the drain-source capacitance and channel resistance constructed from bias-dependent data extracted from S-parameters of RF MOSFETs is developed to reduce $S_{22}$-parameter error of a conventional BSIM4 model. Its accuracy is validated by finding the much better agreement up to 40 GHz between the measured and modeled $S_{22}$-parameter than the conventional one in the wide bias range.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.77-85
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• 2009

With the advent of power semiconductor switching devices, power electronics relating to high frequency electromagnetic eddy current based induction heating technology have become more suitable and acceptable. This paper presents high-frequency induction heating cooking appliance circuit based on the zero current switching-PWM single ended push-pull(ZCS-PWM SEPP) resonant inverter added AC-DC converter. This inverter uses pulse-width-modulation(PWM) control method with active auxiliary quasi-resonant lossless inductor snubbers and a switched capacitor. To improved the transient performance, the PI controller is applied for this system. For the systematic parameter optimization of the PI controller, the gradient-based optimization algorithm is applied. The performance of optimized parameters is evaluated using simulation and experimental test. These results show that the proposed systematic optimal tuning method improve the transient performances of this system.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.176-181
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• 1998

The parallel inverter is popularly used because of its fault-tolerance capability, high-current outputs at constant voltages and system modularity. The conventional parallel inverter usually employs active and reactive power control of frequency and voltage droop control. However, these approaches have the disadvantages that the response time of parallel inverter control is slow against load and system parameter variation to calculate active, reactive power, frequency and voltage. This paper describes a novel control scheme for power equalization in parallel-connected inverter. The proposed scheme has a fast power balance control response, a simplicity of implementation, and inherent peak current limiting capability since it employees an instantaneous current/voltage control with output voltage and current balance and output voltage regulation. A design procedure for the proposed parallel inverter controller is presented. Furthermore, the proposed control scheme is verified through the experiment in various cases such as the system parameter variation, the control parameter variation and the nonlinear load condition.