• The KIPS Transactions:PartC
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• v.17C no.3
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• pp.233-242
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• 2010

In the recent years, power attacks were widely investigated, and so various countermeasures have been proposed. In the case of block ciphers, masking methods that blind the intermediate results in the algorithm computations(encryption, decryption) are well-known. In case of SEED block cipher, it uses 32 bit arithmetic addition and S-box operations as non-linear operations. Therefore the masking type conversion operations, which require some operating time and memory, are required to satisfy the masking method of all non-linear operations. In this paper, we propose a new masked S-boxes that can minimize the number of the masking type conversion operation. Moreover we construct just one masked S-box table and propose a new formula that can compute the other masked S-box's output by using this S-box table. Therefore the memory requirements for masked S-boxes are reduced to half of the existing masking method's one.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.10
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• pp.2750-2759
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• 2009

In this paper, we analyze vulnerabilities in a remote authentication protocol using smartcards which was proposed by Bindu et al. and propose an improved scheme. The proposed scheme can prevent from restricted replay attack and denial of service attack by replacing time stamp with random number. In addition, this protocol can guarantee user anonymity by transmitting encrypted user's ID using AES cipher algorithm. The computational load in our protocol is decreased by removing heavy exponentiation operations and user efficiency is enhanced due to addition of password change phase in which a user can freely change his password. Furthermore, we really implement the proposed authentication protocol using a STM smartcard and authentication server. Then we prove the correctness and effectiveness of the proposed remote authentication system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.8A
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• pp.640-647
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• 2009

IEEE 802.11i is an amendment to the original IEEE 802.11/b,a,g standard specifying security mechanism by stipulating RSNA for tighter security. The RSNA uses TKIP(Temporal Key Integrity Protocol) and CCMP(Counter with CBC-MAC Protocol) instead of old-fashioned WEP(Wired Equivalent Privacy) for data encryption. This paper describes a design of a communication security engine for IEEE 802.11i MAC layer. The design includes WEP and TKIP modules based on the RC4 encryption algorithm, and CCMP module based on the AES encryption algorism. The WEP module suffices for compatibility with the IEEE 802.11 b,a,g MAC layer. The CCMP module has about 816.7Mbps throughput at 134MHz, hence it satisfies maximum 600Mbps data rate described in the IEEE 802.11n specifications. We propose a pipelined AES-CCMP cipher core architecture, which has lower hardware cost than existing AES cores, because CBC mode and CTR mode operate at the same time.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.6
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• pp.1091-1098
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• 2009

In this paper, we designed the authentication system for home network service and applied it to actual sensor nodes. The pair-wise pre-distribution key skim is applied for prevention of authentication key from sniffing on the wireless sensor networks. The authentication key and data are encrypted by using the CBC mode RC5 algorithm based on the SPINS. The experimental environment consists of a base station (BS)and sensor nodes and each sensor node sends both sensing data and the encrypted authentication key to the BS. For simulations we set up some what-if scenarios of security menaces in home network service.Slightly modified the TOS_Msg data arrays of TinyOS is suggested to store 8-byte authentication key which can enable data encryption and authentication at the each sensor node. As a result, malfunction caused by communication between BS and nodes of other groups of added nodes having malicious purpose can be protected. Also, we confirmed that a critical data of home networking service like vital signal can be transmitted securely through this system by encryption technique.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.3
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• pp.603-611
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• 2013

In this paper, we propose a new method which estimates and encrypts significant component of digital image such as digital cinema using discrete wavelet packet transform (DWPT). After analyzing the characteristics of images in spatial and frequency domain, the required information for ciphering an image was extracted. Based on this information an ciphering method was proposed with wavelet transform and packetization of subbands. The proposed algorithm can encrypt images in various robust from selecting transform-level and energy threshold. From analyzing the encryption effect numerically and visually, the optimized parameter for encryption is presented. Without additional analyzing process, one can encrypt efficiently digital image using the proposed parameter. Although only 0.18% among total data is encrypted, the reconstructed image dose not identified. The paketization information of subbands and the cipher key can be used for the entire secret key.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.11C
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• pp.905-916
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• 2008

In this paper, we propose a new method which estimates and encrypts significant component of digital hologram using discrete wavelet packet transform (DWPT). After analyzing the characteristics of digital hologram in spatial and frequency domain, the required information for ciphering digital hologram was extracted. Based on this information an ciphering method was proposed with wavelet transform and packetization of subbands. The proposed algorithm can encrypt digital hologram in various robust from selecting transform-level and energy threshold. From analyzing the encryption effect numerically and visually, the optimized parameter for encryption is presented. Without additional analyzing process, one can encrypt efficiently digital hologram using the proposed parameter. Although only 0.032% among total data is encrypted, the reconstructed object dose not identified. The paketization information of subbands and the cipher key can be used for the entire secret key.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.1B
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• pp.1-10
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• 2003

An EPON which is going on standardization in IEEE 802.3ah, is tree topology consists of a OLT and multiple ONU using passive optical components, so this network is susceptible to variable security threats - eavesdropping, masquerading, denial of service and so on. In this paper, we design a security protocol supporting authentication and confidentiality services in MAC layer in order to prevent these security threats and to guarantee secure data exchange The designed security protocol introduce public-key based authentication and key management protocols for efficient key management, and choose Rijndael algorithm, which is recent standard of AES, to provide the confidentiality of EPON Proposed authentication and key management protocols perform authentication and public-key exchange at a time, and are secure protocols using derived common cipher key by exchanging public random number To implement the designed security protocol, we propose the procedures of authentication and public-key exchange, session key update, key recovery. This proposed protocol is verified using unknown session key, forward secrecy, unknown key-share, key-compromise impersonation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.11
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• pp.33-43
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• 2002

This paper describes a design of cryptographic processor that implements the AES (Advanced Encryption Standard) block cipher algorithm "Rijndael". To achieve high throughput rate, a sub-pipeline stage is inserted into a round transformation block, resulting that two consecutive round functions are simultaneously operated. For area-efficient and low-power implementation, the round transformation block is designed to share the hardware resources for encryption and decryption. An efficient on-the-fly key scheduler is devised to supports the three master-key lengths of 128-b/192-b/256-b, and it generates round keys in the first sub-pipeline stage of each round processing. The Verilog-HDL model of the cryptoprocessor was verified using Xilinx FPGA board and test system. The core synthesized using 0.35-${\mu}m$ CMOS cell library consists of about 25,000 gates. Simulation results show that it has a throughput of about 520-Mbits/sec with 220-MHz clock frequency at 2.5-V supply.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.11
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• pp.1749-1754
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• 2013

Binary sequences of period $2^n-1$ are widely used in many areas of engineering and sciences. Some well-known applications include coding theory, code-division multiple-access (CDMA) communications, and stream cipher systems. In this paper we analyze different solutions to $x^5+bx^3+b^{2^m}x^2+1=0$ over $GF(2^n)$. The number of different solutions determines frequencies of cross-correlations of nonlinear binary sequences generated by $d=3{\cdot}2^m-2$, n=2m, m=4k($k{\geq}2$). Also we give an algorithm for determination of number of different solutions to the equation.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.12 no.5
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• pp.15-25
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• 2002

In this paper a design of high performance cryptographic processor which implements AES Rijndael algorithm is described. To eliminate performance degradation due to round-key computation delay of conventional processor, the on-the-fly precomputation of round key based on modified round structure is adopted. And on-the-fly round key generator which supports 128, 192, and 256-bit key has modular structure. The designed processor has iterative structure which uses 1 clock cycle per round and supports three operation modes, such as ECB, CBC, and CTR mode which is a candidate for new AES modes of operation. The cryptographic processor designed in Verilog-HDL and synthesized using 0.251$\mu\textrm{m}$ CMOS cell library consists of about 51,000 gates. Simulation results show that the critical path delay is about 7.5ns and it can operate up to 125Mhz clock frequency at 2.5V supply. Its peak performance is about 1.45Gbps encryption or decryption rate under 128-bit key ECB mode.