• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.47-53
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• 2012

Bonding strength of Sn-3.0Ag-0.5Cu solder joint due to degradation characteristic of OSP surface finish was investigated, compared with SnPb finish. The thickness variation and degradation mechanism of organic solderability preservative(OSP) coating were also analyzed with the number of reflow process. To analyze the degradation degree of solder joint strength, FR-4 PCB coated with OSP and SnPb were experienced preheat treatment as a function of reflow number from 1st to 6th pass, respectively. After 2012 chip resistors were soldered with Sn-3.0Ag-0.5Cu on the pre-heated PCB, the shear strength of solder joints was measured. The thickness of OSP increased with increase of the number of reflow pass by thermal degradation during the reflow process. It was also observed that the preservation effect of OSP decreased due to OSP degradation which led Cu pad oxidation. The mean shear strength of solder joints formed on the Cu pads finished with OSP and SnPb were 58.1 N and 62.2 N, respectively, through the pre-heating of 6 times. Although OSP was degraded with reflow process, the feasibility of its application was proven.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.2
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• pp.7-15
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• 2012

Semiconductor packages are increasingly moving toward miniaturization, lighter and multi-functions for mobile application, which requires highly integrated multi-stack package. To meet the industrial demand, the package and silicon chip become thinner, and ultra-thin packages will show serious reliability problems such as warpage, crack and other failures. These problems are mainly caused by the mismatch of various package materials and geometric dimensions. In this study we perform the numerical analysis of the warpage deformation and thermal stress of 4-layer stacked FBGA package after EMC molding and reflow process, respectively. After EMC molding and reflow process, the package exhibits the different warpage characteristics due to the temperature-dependent material properties. Key material properties which affect the warpage of package are investigated such as the elastic moduli and CTEs of EMC and PCB. It is found that CTE of EMC material is the dominant factor which controls the warpage. The results of RSM optimization of the material properties demonstrate that warpage can be reduced by $28{\mu}m$. As the silicon die becomes thinner, the maximum stress of each die is increased. In particular, the stress of the top die is substantially increased at the outer edge of the die. This stress concentration will lead to the failure of the package. Therefore, proper selection of package material and structural design are essential for the ultra-thin die packages.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.2
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• pp.71-79
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• 2021

In this study, we have successfully fabricated the Sn-Ni paste and evaluated the bonding properties for high-temperature endurable EV (Electric Vehicle) power module applications. From evaluating of the micro-structural changes in the TLPS (Transient Liquid Phase Sintering) joints with Sn and Ni contents in the Sn-Ni pastes, a lack of Ni powders and Ni particle agglomerations by Ni surplus were observed in the Sn-20Ni and Sn-50Ni joints (in wt.%), respectively. In contrast, relatively dense microstructures are observed in the Sn-30Ni and Sn-40Ni TLPS joints. From differential scanning calorimetry (DSC) thermal analysis results of the fabricated Sn-Ni paste and TLPS bonded joints, we confirmed that the complete reactions of Sn with Ni to form Ni-Sn intermetallic compounds (IMCs) at bonding temperatures occurred, and there is no remaining Sn in the joints after TLPS bonding. In addition, the interfacial reactions and IMC phase changes of the Sn-30Ni joints under various bonding temperatures were reported, and their mechanical shear strength were investigated. The TLPS bonded joints were mainly composed of residual Ni particles and Ni₃Sn₄ intermetallic phase. The average shear strength tended to increase with increasing bonding temperature. Our results indicated a high shear strength value of approximately 30 MPa at a bonding temperature of 270 ℃ and a bonding time of 30 min.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.2
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• pp.81-89
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• 2022

The in-situ electromigration(EM) and annealing test were performed at 110, 130, and 150℃ with a current density of 1.3×10⁵ A/cm² conditions to investigate the effect of non-conductive film (NCF) on growth kinetics of intermetallic compound (IMC) in Cu/Ni/Sn-2.5Ag microbump. As a result, the activation energy of the Ni₃Sn₄ IMC growth in the annealing and EM conditions according to the NCF application was about 0.52 eV, and there was no significant difference. This is because the growth rate of Ni-Sn IMC is much slower than that of Cu-Sn IMC, and the growth behavior of Ni-Sn IMC increases linearly with the square root of time, so it has the same reaction mechanism dominated by diffusion. In addition, there is no difference in the activation energy of the Ni₃Sn₄ IMC growth because the EM resistance effect of the back stress according to the NCF application is not large.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.2
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• pp.59-64
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• 2022

Effects of film stack structure and peeling rate on the peel strength of screen-printed (SP) Ag/polyimide (PI) systems were investigated by a 90° peel test. When PI film was peeled at PI/SP-Ag and PI/SP-Ag/electroplated (EP) Cu structures, the peel strength was nearly constant regardless of the peeling rate. When EP Cu was peeled at EP Cu/SP-Ag/PI structure, the peel strength continuously increased as peeling rate increased. Considering uniaxial tensile test results of EP Cu/SP-Ag film with respect to loading rate, the increase of 90° plastic bending energy and peel strength was attributed to increased flow stress and toughness. On the other hand, viscoelastic PI film showed little variation of flow stress and toughness with respect to loading rate, which was assumed to result in nearly constant 90° plastic bending energy and peel strength.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.52-59
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• 2023

The effects of dielectric curing temperature and temperature/humidity treatment conditions on the interfacial adhesion energies between Ti diffusion barrier/polybenzoxazole (PBO) dielectric layers were systematically investigated for Cu redistribution layer applications of fan-out wafer level package. The initial interfacial adhesion energies were 16.63, 25.95, 16.58 J/m² for PBO curing temperatures at 175, 200, and 225 ℃, respectively. X-ray photoelectron spectroscopy analysis showed that there exists a good correlation between the interfacial adhesion energy and the C-O peak area fractions at PBO delaminated surfaces. And the interfacial adhesion energies of samples cured at 200 ℃ decreased to 3.99 J/m² after 500 h at 85 ℃/85 % relative humidity, possibly due to the weak boundary layer formation inside PBO near Ti/PBO interface.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.4
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• pp.61-68
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• 2023

In this study, Sn-3.5Ag-15.0Fe composite solder was manufactured and applied to TLP bonding to change the entire joint into a Sn-Fe IMC(intermetallic compound), thereby applying it as a high-temperature solder. The FeSn₂ IMC formed during the bonding process has a high melting point of 513℃, so it can be stably applied to power modules for power semiconductors where the temperature rises up to 280℃ during use. As a result of applying ENIG surface treatment to both the chip and substrate, a multi-layer IMC structure of Ni₃Sn₄/FeSn₂/Ni₃Sn₄ was formed at the joint. During the shear test, the fracture path showed that cracks developed at the Ni₃Sn₄/FeSn₂ interface and then propagated into FeSn₂. After 2hours of the TLP joining process, a shear strength of over 30 MPa was obtained, and in particular, there was no decrease in strength at all even in a shear test at 200℃. The results of this study can be expected to lead to materials and processes that can be applied to power modules for electric vehicles, which are being actively researched recently.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.3
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• pp.19-27
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• 2003

Surface finishes of PCB laminates are important in the solder joint reliability of flip chip package because the types and thicknesses of intermetallic compound(IMC), and compositions and hardness of solders are affected by them. In this study, effects of surface finishes of PCB on the low cycle fatigue resistance of Sn-based lead-free solders; Sn-3.5Ag, Sn-3.5Ag-XCu(X=0.75, 1.5), Sn-3.5Ag-XBi(X=2.5, 7.5) and Sn-0.7Cu were investigated for the Cu and Au/Ni surface finish treatments. Displacement controlled room temperature lap shear fatigue tests showed that fatigue resistance of Sn-3.5Ag-XCu(X=0.75, 1.5), Sn-3.5Ag and Sn-0.7Cu alloys were more or less the same each other but much better than that of Bi containing alloys regardless of the surface finish layer used. In general, solder joints on the Au/Ni finish showed better fatigue resistance than those on the Cu finish. Cross-sectional fractography revealed microcracks nucleation inside of the interfacial IMC near the solder mask edge, more frequently on the Cu than the Au/Ni surface finish. Macro cracks followed the solder/IMC interface in the Bi containing alloys, while they propagated in the solder matrix in other alloys. It was ascribed to the Bi segregation at the solder/IMC interface and the solid solution hardening effect of Bi in the $\beta-Sn$ matrix.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.189-195
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• 2004

A 10 Gb/s limiting amplifier IC with the emitter area of $1.5{\times}10{\mu}m^2$ for optical transmission system was designed and fabricated with a AIGaAs/GaAs HBTs technology. In this stud)', we evaluated fine pitch bump using WL-CSP (Wafer Level-Chip Scale Packaging) instead of conventional wire bonding for interconnection. For this we developed WL-CSP process and formed fine pitch solder bump with the $40{\mu}m$ diameter and $100{\mu}m$ pitch on bonding pad. To study the effect of WL-CSP, electrical performance was measured and analyzed in wafer and package module using WL-CSP. In a package module, clear and wide eye diagram openings were observed and the riselfall times were about 100ps, and the output" oltage swing was limited to $600mV_{p-p}$ with input voltage ranging from 50 to 500m V. The Small signal gains in wafer and package module were 15.56dB and 14.99dB respectively. It was found that the difference of small signal gain in wafer and package module was less then 0.57dB up to 10GHz and the characteristics of return loss was improved by 5dB in package module. This is due to the short interconnection length by WL-CSP. So, WL-CSP process can be used for millimeter wave GaAs MMIC with the fine pitch pad.

• Journal of Welding and Joining
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• v.30 no.2
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• pp.65-69
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• 2012

Environmental and health concerns over the lead have led to investigation of the alternative Pb-free solders to replace commonly used Pb-Sn solders in microelectronic packaging application. The leading candidates for lead-free solder alloys are presently the near eutectic Sn-Ag-Cu alloys. Therefore, extensive studies on reliability related with the composition have been reported. However, the insufficient drop property of the near eutectic Sn-Ag-Cu alloys has demanded solder compositions of low Ag content. In addition, the solder interconnections in automobile applications like a smart box require significantly improved vibration resistance. Therefore, this study investigated the effect of alloying elements (Ag, Bi, In) on the vibration fatigue strength. The vibration fatigue was conducted in 10~1000Hz frequency and 20Grms. The interface of the as-soldered cross section close to the Cu pad indicated the intermetallic compound ($Cu_6Sn_5$) regardless of solder composition. The type and thickness of IMC was not significantly changed after the vibration test. It indicates that no thermal activities occurred significantly during vibration. Furthermore, as a function of alloying composition, the vibration crack path was investigated with a focus on the IMCs. Vibration crack was initiated from the fillet surface of the heel for QFP parts and from the plating layer of chip parts. Regardless of the solder composition, the crack during a vibration test was propagated as same as that during a thermal fatigue test.