• 제목/요약/키워드: Chip-packaging

검색결과 480건 처리시간 0.033초

CSP의 Multi-sorting을 위한 pick and place 시스템의 개발 (The development of Pick and place system for multi-sorting of CSP)

  • 김찬용;곽철훈;이은상
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1997년도 추계학술대회 논문집
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    • pp.171-174
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    • 1997
  • The great development of semiconductor industry demands the high efficiency and performance of related device, but the pick and place system of semiconductor packaging device can load a few units until nowdays. Although the system can load a lot of units, it can work multiple sort operation. The defect like that causes a low efficiency. Therefore, this paper represents the development of pick and place system which can work multiple sort operation.

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비전도성 에폭시를 사용한 RF-MEMS 소자의 웨이퍼 레벨 밀봉 실장 특성

  • 박윤권;이덕중;박흥우;송인상;박정호;김철주;주병권
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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    • pp.129-133
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    • 2001
  • In this paper, hermetic sealing was studied fur wafer level packaging of the MEMS devices. With the flip-chip bonding method, this B-stage epoxy sealing will be profit to MEMS device sealing and further more RF-MEMS device sealing. B-stage epoxy can be cured 2-step and hermetic sealing can be obtained. After defining $500{\mu}{\textrm}{m}$-width seal-lines on the glass cap substrate by screen printing, it was pre-baked at $90^{\circ}C$ for about 30 minutes. It was then aligned and bonded with device substrate followed by post-baked at $175^{\circ}C$ for about 30 minutes. By using this 2-step baking characteristic, the width and the height of the seal-line were maintained during the sealing process. The height of the seal-line was controlled within $\pm0.6${\mu}{\textrm}{m}$ and the strength was measured to about 20MPa by pull test. The leak rate of the epoxy was about $10^7$ cc/sec from the leak test.

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RF MEMS 소자 실장을 위한 LTCC 및 금/주석 공융 접합 기술 기반의 실장 방법 (LTCC-based Packaging Method using Au/Sn Eutectic Bonding for RF MEMS Applications)

  • 방용승;김종만;김용성;김정무;권기환;문창렬;김용권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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    • pp.30-32
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    • 2005
  • This paper reports on an LTCC-based packaging method using Au/Sn eutectic bonding process for RF MEMS applications. The proposed packaging structure was realized by a micromachining technology. An LTCC substrate consists of metal filled vertical via feedthroughs for electrical interconnection and Au/Sn sealing rim for eutectic bonding. The LTCC capping substrate and the glass bottom substrate were aligned and bonded together by a flip-chip bonding technology. From now on, shear strength and He leak rate will be measured then the fabricated package will be compared with the LTCC package using BCB adhesive bonding method which has been researched in our previous work.

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EFFECTS OF PROCESS INDUCED DEFECTS ON THERMAL PERFORMANCE OF FLIP CHIP PACKAGE

  • Park, Joohyuk;Sham, Man-Lung
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2002년도 추계기술심포지움논문집
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    • pp.39-47
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    • 2002
  • Heat is always the root of stress acting upon the electronic package, regardless of the heat due to the device itself during operation or working under the adverse environment. Due to the significant mismatch in coefficient of thermal expansion (CTE) and the thermal conductivity (K) of the packaging components, on one hand intensive research has been conducted in order to enhance the device reliability by minimizing the mechanical stressing and deformation within the package. On the other hand the effectiveness of different thermal enhancements are pursued to dissipate the heat to avoid the overheating of the device. However, the interactions between the thermal-mechanical loading has not yet been address fully. in articular when the temperature gradient is considered within the package. To address the interactions between the thermal loading upon the mechanical stressing condition. coupled-field analysis is performed to account the interaction between the thermal and mechanical stress distribution. Furthermore, process induced defects are also incorporated into the analysis to determine the effects on thermal conducting path as well as the mechanical stress distribution. It is concluded that it feasible to consider the thermal gradient within the package accompanied with the mechanical analysis, and the subsequent effects of the inherent defects on the overall structural integrity of the package are discussed.

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솔더접합부에 대한 기계적 스트레스 평가 (Evaluation of Mechanical Stress for Solder Joints)

  • 김정관
    • 마이크로전자및패키징학회지
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    • 제9권4호
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    • pp.61-68
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    • 2002
  • 지금까지 전자 디바이스의 솔더접합부에 대한 신뢰성 평가에 있어서는 열충격시험에 의한 평가가 주류를 이루었다. 그러나 최근 모바일 제품이 소형화/다기능화되고 고밀도실장에 대한 요구가 증가함에 따라 BGA/CSP와 같은 솔더볼을 사용하는 패키지가 표면실장의 주류를 이루게 되었으며, 솔더접합부에 대한 메커니컬 스트레스 수명이 요구되어지고 있다. BGA/CSP의 솔더접합부에 대한 신뢰성 평가는 하중을 가한 상태에서 데이지체인 패턴의 전기적 저항변화와 스트레인 게이지에 의한 스트레스-스트레인 커브에 의해 행해진다. 본 연구에서는 자체 개발한 PCB만능시험장치의 응용과 솔더접합부에 대한 메커니컬 스트레스의 동적거동을 평가한 소니의 실험자료를 소개하도록 한다.

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AlN 기판을 이용한 RF 고전력 증폭기 모듈 (RF High Power Amplifier Module using AlN Substrate)

  • 김승용;남충모
    • 한국전기전자재료학회논문지
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    • 제22권10호
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    • pp.826-831
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    • 2009
  • In this paper, a high power RF amplifier module using AlN substrate of high thermal conductivity has been proposed. This RF amplifier module has the advantage of compact size and effective heat dissipation for the packaging of high power chip. To fabricate the thru-hole and scribing line on AlN substrate, the key parameters of $CO_2$ laser were experimented. And then, microstrip lines and spiral planar inductors were fabricated on an AlN substrate using the thin-film process. The fabricated microstrip lines on the AlN substrate has an attenuation value of 0.1 dB/mm up to 10 GHz. The fabricated spiral planar inductor has a high quality factor, a maximum of about 62 at 1 GHz for a 5.65 nH inductor. Packaging of a RF power amplifier was implemented on an AlN substrate with thru-hole. From the measured results, the gain is 24 dB from 13 to 15 GHz and the output power is 33.65 dBm(2.3 W).