• ETRI Journal
• /
• 제27권5호
• /
• pp.497-503
• /
• 2005

In this paper, we present a performance analysis for an MPEG-4 video codec based on the on-chip network communication architecture. The existing on-chip buses of system-on-a-chip (SoC) have some limitation on data traffic bandwidth since a large number of silicon IPs share the bus. An on-chip network is introduced to solve the problem of on-chip buses, in which the concept of a computer network is applied to the communication architecture of SoC. We compared the performance of the MPEG-4 video codec based on the on-chip network and Advanced Micro-controller Bus Architecture (AMBA) on-chip bus. Experimental results show that the performance of the MPEG-4 video codec based on the on-chip network is improved over 50% compared to the design based on a multi-layer AMBA bus.

• 마이크로전자및패키징학회지
• /
• 제9권1호
• /
• pp.43-48
• /
• 2002

Semiconductor chip encapsulation process is employed to protect the chip and to achieve optimal performance of the chip. Expert decision-making to obtain the appropriate package design or process conditions with high yields and high productivity is quite difficult. In this paper, an expert system for semiconductor chip encapsulation has been constructed which combines a knowledge-based system with CAE software.

• 스마트미디어저널
• /
• 제1권1호
• /
• pp.27-35
• /
• 2012

본 논문은 온칩 네트워크 기반 플랫폼을 이용한 멀티미디어 비디오 코덱의 성능 분석에 대해 기술한다. 최근에 멀티미디어 SoC 통신 구조로 등장한 온칩 네트워크(On-Chip Network)는 기존의 SoC 설계에 사용된 온칩 버스(On-Chip Bus) 구조의 문제점을 해결하는 통신 구조로서 데이터 통신의 병렬성 제공으로 인한 고성능, 재사용성, 확장성을 제공하는 통신 구조이다. 온칩 네트워크 기반 MPEG-4, H.264의 성능과 온칩 버스와 성능을 비교 분석하였다. 실험 결과, 온칩 네트워크 기반 MPEG-4, H.264의 성능이 온칩 버스에 비해 33~56%의 성능이 개선되었다.

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 1995년도 추계학술대회 논문집
• /
• pp.271-275
• /
• 1995

Chip control is a major problem in automatic machining process, especially in finish operation. Chip breaker is one of the important factors to be determined for the scheme of chip control. As unbroken chips are grown, there deteriorate quality of the surface roughness and process automation can be carried out. In this study, to get rid of chip curling problem while turning internal hole, optimal chip breaker is selected form the experiment. The experiment is planned with Taguchi's method that is based on the orthogonal arrary of design factor. From the respose table, cutting speed, feedrate, depth of cut, and tool geometry are major factors affecting chip formation. Then, optmal chip breaker is selected and this is verified good enough for chip control from the experiment.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
• /
• pp.57-57
• /
• 2000

The purpose of this paper is show that an chip mounter can be modeled by stochastic petri nets, and that the simulator to verify a fitness of the program to assemble. The chip mounter can be constructed by using the petri net class (CPetriNet) based on the object-oriented programming. By using this simulator, we can get the information about the description of motion of the chip mounter, and moreover, we can evaluate the productivity.

• 한국반도체및디스플레이장비학회:학술대회논문집
• /
• 한국반도체및디스플레이장비학회 2003년도 추계학술대회 발표 논문집
• /
• pp.154-159
• /
• 2003

Semiconductor chip encapsulation process is employed to protect the chip and to achieve optimal performance of the chip. Expert decision-making to obtain the appropriate package design or process conditions with high yields and high productivity is quite difficult. In this paper, an expert system for semiconductor chip encapsulation has been constructed which combines a knowledge-based system with CAE software.

• 반도체디스플레이기술학회지
• /
• 제14권3호
• /
• pp.13-22
• /
• 2015

LED (Light Emitting Diode) lighting is gaining more and more market penetration as one of the global warming countermeasures. LED is the next generation of fusion source composed of epi/chip/packaging of semiconductor process technology and optical/information/communication technology. LED has been applied to the existing industry areas, for example, automobiles, TVs, smartphones, laptops, refrigerators and street lamps. Therefore, LED makers have been striving to achieve the leading position in the global competition through development of core source technologies even before the promotion and adoption of LED technology as the next generation growth engine with eco-friendly characteristics. However, there has been a point of view on the cost compared to conventional lighting as a large obstacle to market penetration of LED. Therefore, companies are developing a Chip-Scale Packaging (CSP) LED technology to improve performance and reduce manufacturing costs. In this study, we perform patent analysis associated with Flip-Chip CSP LED and flow chart for promising technology forecasting. Based on our analysis, we select key patents and key patent players to derive the business strategy for the business success of Flip-Chip CSP PKG LED products.

• 대한전자공학회논문지TC
• /
• 제48권11호
• /
• pp.28-34
• /
• 2011

최근 들어 CDMA 기반 시스템에서 고속 데이터 서비스 지원을 위한 수신 성능 개선 방법의 하나로 chip-level equalization 기법에 대한 연구가 활발히 진행되고 있다. 이와 관련된 연구의 하나로 본 논문에서는 D-TxAA (dual stream transmit antenna array) 방식을 사용하는 HSDPA MIMO 시스템에 적용 가능한 Griffiths algorithm 기반 chip-level 적응 LMMSE equalizer의 구조를 제안하고자 한다. 먼저 Griffiths 알고리즘을 D-TxAA 방식에 적용할 경우 사용 가능한 두 가지 형태의 적응 LMMSE equalizer 구조를 유도할 것이며, 여러 채널 환경에 대한 컴퓨터 모의실험을 통해 두 수신기의 성능을 비교 분석하고자 한다.

• 한국생산제조학회지
• /
• 제7권3호
• /
• pp.118-125
• /
• 1998

Chip control is a major problem in automatic machining process, especially in finish turning operation. In this case, chip breaker is one of the important factors to be determined. As unbroken chips are grown. these deteriorate the surface roughness. and proces automation can not be carried out. In this study to get rid of chip curling problem while turning internal hole. optimal chip breaker is selected from the experiment. The experiment is planned with Taguchi's method that is based on the orthogonal arrary of design factors. From the response table. cutting speed, feedrate, depth of cut and tool geometry turn to be major factors affecting chip formation. Then, optimal chip breaker is selected. and this is verified as good enough for chip control from the experiment.

• 한국정밀공학회지
• /
• 제17권12호
• /
• pp.163-168
• /
• 2000

Once the chip has developed a mixed mode of side-curl and up-curl, it would generally curl to strike the tool flank. The development of the bending stresses and sheat in the chip would ultimately lead to chip failure. This paper approach this problem from a mechanics-based approach, by treating the chip as a 3-D elastic curved beam, and applying appropriate constraints and forces. The expressions for bending, shear and direct stresses are developed through an energy-based criterion. The location of the maximum stresses is also identified and explained for simulated test conditions.