• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.407-410
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• 1999

Viterbi decoder is implemented with a Radix-4 architecture at 0.5$\mu\textrm{m}$ process even though the delay time of standard tell is big and it causes a bigger chip size. As process develops, the delay time of standard cells is getting smaller. Therefore, the requirement of speed and chip size is satisfied by using Radix-2 algorithm to implement Viterbi decoder.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.8 no.4
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• pp.14-19
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• 2009

Micro fluid channels are machined on quartz glass using powder blasting, and the machining characteristics of the channels are experimentally evaluated. The powder blasting process parameters such as injection pressure, abrasive particle size and density, stand-off distance, number of nozzle scanning, and shape/size of the required patterns affect machining results. In this study, the influence of the number of nozzle scanning, abrasive particle size, and blasting pressure on the formation of micro channels is investigated. Machined shapes and surface roughness are measured, and the results are discussed. Through the experiments and analysis, LOC are ettectinely machined on quartz glass using powder blasting.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.7
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• pp.328-334
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• 2002

The DNA chips are devices associating the specific recognition properties of two DNA single strands through hybridization process with the performances of the microtechnology. In the literature, the "Gene chip" or "DNA chip" terminology is employed in a wide way and includes macroarrays and microarrays. Standard definitions are not yet clearly exposed. Generally, the difference between macro and microarray concerns the number of active areas and their size, Macroarrays correspond to devices containing some tens spots of 500$\mu$m or larger in diameter. microarrays concern devices containing thousnads spots of size less than 500$\mu$m. The key technical parameters for evaluating microarray-manufacturing technologies include microarray density and design, biochemical composition and versatility, repreducibility, throughput, quality, cost and ease of prototyping. Here we report, a new method in which minute particles are arranged in a random fashion on a chip pattern using random fluidic self-assembly (RFSA) method by hydrophobic interaction. We intend to improve the stability of the particles at the time of arrangement by establishing a wall on the chip pattern, besides distinction of an individual particle is enabled by giving a tag structure. This study demonstrates the fabrication of a chip pattern, immobilization of DNA to the particles and arrangement of the minute particle groups on the chip pattern by hydrophobic interaction.ophobic interaction.

• ETRI Journal
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• v.19 no.3
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• pp.228-241
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• 1997

In this paper, we present a design of modem and vocoder digital signal processor (DSP) chips for CDMA mobile station. The modem chip integrates CDMA reverse link modulator, CDMA forward link demodulator and Viterbi decoder. This chip contains 89,000 gates and 29 kbit RAMs, and the chip size is $10 mm{\times}10.1 mm$ which is fabricated using a $0.8{\mu}m$ 2 metal CMOs technology. To carry out the system-level simulation, models of the base station modulator, the fading channel, the automatic gain control loop, and the microcontroller were developed and interfaced with a gate-level description of the modem application specific integrated circuit (ASIC). The Modem chip is now successfully working in the real CDMA mobile station on its first fab-out. A new DSP architecture was designed to implement the Qualcomm code exited linear prediction (QCELP) vocoder algorithm in an efficient way. The 16 bit vocoder DSP chip has an architecture which supports direct and immediate addressing modes in one instruction cycle, combined with a RISC-type instruction set. This turns out to be effective for the implementation of vocoder algorithm in terms of performance and power consumption. The implementation of QCELP algorithm in our DSP requires only 28 million instruction per second (MIPS) of computation and 290 mW of power consumption. The DSP chip contains 32,000 gates, 32K ($2k{\times}16\;bit$) RAM, and 240k ($10k{\times}24\;bit$) ROM. The die size is $8.7\;mm{\times}8.3\;mm$ and chip is fabricated using $0.8\;{\mu}m$ CMOS technology.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.10a
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• pp.985-988
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• 1997

In end milling process, the undeformed chip section area and cutting forces vary periodically with phase change of the tool. However the real undeformed chip section area deviates from the geometrically ideal one owing to cutter runout and tool shape error. In this study ,a method of estimating the real undeformed chip section area which reflects cutter runout and tool shape error was presented in up end milling process using measured cutting forces. Size effect was identified from the analysis of specific cutting resistance obtained by using the modified undeformed chip section area.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.633-640
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• 2002

In this paper, the small chip meander antenna for dual-frequency operation is presented. The proposed chip meander antennas was fabricated by the ceramic chip using LTCC-MLC process. It is a novel compact dual-frequency design using a meandered patch that achieves more degrees of freedom for adjusting dual-frequency operation and the size reduction with narrow frequency ratio. And it is proposed that the 3D structure for additional size reduction of the meander antenna. The size reduction of the 3D meander antenna is as large as 50 % as compared to the design for dual-frequency operation not using 3D structure. It is observed that the principle of dual-frequency operation through current distribution, return loss and radiation pattern.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.11 no.3
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• pp.28-32
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• 2002

Recently, the miniature of electric products such as notebook, cellular-phone etc. is apparently appeared, due to the smaller size of the semiconductor chips. As the size of chip gets smaller, the circuit could be easily damaged by the slightest influence, therefore it is important to investigate the machining quality of $\mu$ BGA. This paper deals with machining characteristics of the $\mu$ BGA singulation. The relationships between the singulation face and machining quality of the $\mu$ BGA singulation are investigated. It is confirmed that machining quality improves as the singulation force decreases.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.181-184
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• 2001

This paper has been studied driving circuits in electrical valves. Also in this paper, opto-couplers of driving circuit are replaced with digital one chip of Altera company. Designs in order to realization of one chip are carried out with Altera Max Plus II. For compact size and light weight, the realization with one chip is necessary in the electrical valves. This paper has designed and presented the digital schemetic circuits, finally the driving circuits are sucessfully operated with the designed chip and showed the saving of area in the driving circuits of electric valves.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2008.06a
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• pp.519-520
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• 2008

• The Journal of Asian Finance, Economics and Business
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• v.7 no.12
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• pp.783-793
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• 2020

This research investigates the explanatory factors governing the dividend payout to shareholders of blue-chip companies listed on Bursa Malaysia. In spite of continuous attention offered by empirical research on dividend payout of publicly-listed companies, paradoxically only few studies exclusively examined the explanatory factors from the perspective of blue-chip companies. Recognizing the capability of blue-chip companies to serve as a stalwart indicator of stock market condition as well as a consistent income source to shareholders, more research should be carried out for better inference on the companies' dividend payout decision. This research is using 522 observations from a sample of 18 Malaysian blue-chip companies over a 29-year period (1990 to 2019) and utilizes a panel data regression analysis for the estimation of the impact of eight factors, namely, systematic risk, leverage, free cash flow, lagged dividends, market-to-book value, profit growth, total asset turnover, and company size. Measuring dividend payout using two specifications (dividend/earnings and dividend/total assets), this research reveals that systematic risk and free cash flow have a significant and negative impact on dividend payout. Meanwhile, past year dividends, market-to-book value, profit growth, total asset turnover and company size have a significant and positive impact on dividend payout.