• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.85-88
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• 2001

This paper suggests an improved switch architecture for the rechargeable battery protection IC. In the existing protection IC, charging and discharging switches composed of the CMOS transistor and the diode are external components. It is difficult to integrate the switches in a CMOS process due to the large chip-size overhead and inevitable parasitic effects. In this paper, we propose a new switch architecture of the MOSFET's 'diode connection' method. The performance and chip-size overhead are proved to be adequate for the fully integrated protection IC.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.105-108
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• 2001

4 32-bit RISC core is designed for embedded application and DSP. This processor offers low power consumption by fully static operation and compact code size by efficient instruction set. Processor performance is improved by wing conditional instruction execution, block data transfer instruction, multiplication instruction, bunked register file structure. To support compact code size of embedded application, It is capable cf executing both 16-bit instructions and 32-bit instruction through mixed mode instruction conversion Furthermore, for fast MAC operation for DSP applications, the processor has a dedicated hardware multiplier, which can complete a 32-bit by 32-bit integer multiplication within seven clock cycles. These result in high instruction throughput and real-time interrupt response. This chip is implemented with 0.35${\mu}{\textrm}{m}$, 4- metal CMOS technology and consists of about 50K gate equivalents.

• Journal of the Korean Society for Precision Engineering
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• v.7 no.4
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• pp.73-84
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• 1990

A burr has been defined as an undesirable projection of material formed as the result of plastic flow from a cutting or shearing operation. It is Unavoidable in all kinds of machining operation. This paper describe the burr formation mechanism which is based on the behavior of workpiece material during orthogonal machining of the clay on the milling machine. Specially in this report the rollover burr is dealt as a specific case of the chip formation in the final stage of cutting. The negative shear angle is introduced as an important features of burr formation. It is found that the burr formation process is divided into three stage-initiation, development of negative shearing, and formation of the burr with appropriate assumptions. Using above the burr formation mechanism, the size of burr can be estimated by cutting conditions.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2001.11a
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• pp.77-81
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• 2001

This paper proposed a novel chip type ceramic dielectric antenna by using the advanced meander line technique that the radiational metals are formed on the face of ceramic dielectric(8 ${\times}$ 4 ${\times}$ 1.5 mm, alumina) and both facses of substrate(1.0 mm thickness, FR-4). The performance of the antenna model has a good agreements between measurements and computed results. Resultly, it has a 10 dB return-loss bandwidth(2.4～2.4835 GHz) and 1.7 dBi measured radiation gain for Bluetooth application. The proposed antenna model can overcome the problems of the radiation gain from the small antenna's size.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.3
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• pp.427-432
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• 2012

In this paper, we have designed and fabricated 7-bands (GSM 850/900, DCS/PCS, and UMTS 3 bands) LTCC front end module (FEM) embedded LPF (low pass filter) to efficiently eliminate harmonics generated in TX path. The proposed FEM is composed of flip-chip typed CMOS SP9T switch to select transceiver signals, dual type SAW filters to receive Rx signals, and 0603 size chip components for the antenna matching and ESD protection. The whole size of FEM is $4.5{\times}3.2{\times}1.2mm^3$. The insertion loss of Tx and Rx ports are measured at 1.7 dB and 4.8 dB, respectively.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2004.10a
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• pp.122-127
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• 2004

The purpose of this study is to introduce the standard of the durability and evaluation method for paper shredder. The major evaluation criteria include shredding capability, shredding blade (or cutter) hardness and edge roughness, and durability. Due to the difficulties in assessing the durability directly, performance deterioration of the shredder was assessed by measuring the torque variation along with the variation in shredded chip size and load, thereby proposing the indirect method of assessing the paper shredder durability.

• Journal of the Korea Society of Computer and Information
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• v.4 no.3
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• pp.47-52
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• 1999

The efficiency of an adder which plays an important role in micro-process and DSP greatly depends on the kinds of carry generation method. So in this paper. I used both CLA excellent in the speed and CSA best in the chip-size. The 64bit adder is designed with high speed which is two optimum combination. Therefore this paper suggested the way of CLSA improving both speed and chip-size. and proved the excellence of the designed circuit.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.2
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• pp.98-103
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• 2013

The alumina substrates that Ni electrode was printed on and the multi-layered PTCR thermistors of which composition is $(Ba_{0.998}Ce_{0.002})TiO_3+0.001MnCO_3+0.05BN$ were fabricated by a thick film process, and the effect of re-oxidation temperature on their resistivities and resistance jumps were investigated, respectively. Ni electroded alumina substrate and the multi-layered PTC thermistor were sintered at $1150^{\circ}C$ for 2 h under $PO_2=10^{-6}$ Pa and then re-oxidized at $600{\sim}850^{\circ}C$ for 20 min. With increasing the re-oxidation temperature, the room temperature resistivity increased and the resistance jump ($LogR_{290}/R_{25}$) decreased, which seems to be related to the oxidation of Ni electrode. The small sized chip PTC thermistor such as 2012 and 3216 exhibits a nonlinear and rectifying behavior in I-V curve but the large sized chip PTC thermistor such as 4532 and 6532 shows a linear and ohmic behavior. Also, the small sized chip PTC thermistor such as 2012 and 3216 is more dependent on the re-oxidation temperature and easy to be oxidized in comparison with the large sized chip PTC thermistor such as 4532 and 6532. So, the re-oxidation conditions of chip PTC thermistor may be determined by considering the chip size.

• Asian Pacific Journal of Cancer Prevention
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• v.16 no.9
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• pp.3709-3713
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• 2015

Background: Many factors, including molecular ones, were demonstrated to be associated with long-term prognosis of hepatocellular carcinoma (HCC). Thus far, the expression and clinicopathologic and prognostic significance of the carboxyl terminus of Hsp70-interacting protein (CHIP) in B-type hepatitis virus (HBV)-related HCC remain unknown. Materials and Methods: CHIP expression was detected by immunohistochemical staining of surgical samples from 79 patients with HCC with HBsAg positivity. In addition, correlations with clinicopathologic parameters and patient survival were evaluated. Results: It was found that positive CHIP staining was observed in tumor, but not non-tumor, tissues. High expression of CHIP was significantly related to larger tumor size, with marginally significant associations noted for presence of portal vein invasion and higher serum a-fetoprotein level. In addition, univariate analysis showed that high CHIP expression was a powerful predictor for dismal overall and disease-free survival. However, independent prognostic implications of CHIP were not proven in multivariate Cox regression test. Conclusions: CHIP is overexpressed in HBV-related HCC and is associated with unfavorable biological behavior as well as poor prognosis. However, its prognostic role needs to be further validated.

• Journal of Sensor Science and Technology
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• v.12 no.2
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• pp.57-65
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• 2003

When a vision chip for edge detection using CMOS process is designed, there is a necessity to implement local light adaptive-function for detecting distinctive features of an image at a wide range of light intensities. Local light adaptation is to achive the almost same output level by changing the size of receptive-fields of the local horizontal cell layers according to input light intensities, based on the lateral inhibitive-function of the horizontal cell. Thus, the almost same output level can be obtained whether input light intensities are much or less larger than background. In this paper, the horizontal cells using a resistive network which consists of p-MOSFETs were modeled and analyzed, and the local light adaptive-mechanism of the designed vision chip using the resistive network was verified.