• 한국생산제조학회지
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• 제20권5호
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• pp.559-563
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• 2011

Drop impact reliability assessment of solder joints on the flip chip is one of the critical issues for micro system packaging. Our previous researches have been showing that new solder ball compositions of Sn-3.0Ag-0.5Cu has better mechanical reliability than Sn-1.0Ag-0.5Cu. In this paper, dynamic reliability analysis using Finite Element Analysis (FEA) is carried out to assess the factors affecting flip chip in drop simulation. The design parameters are size and thickness of chip, and size, pitch and array of solder ball with composition of Sn1.0Ag0.5Cu. The board systems by JEDEC standard including 15 chips, solder balls and PCB are modeled with various design parameter combinations, and through these simulations, maximum yield stress and strain at each chip are shown at the solder balls. It is found that larger chip size, smaller chip array, smaller ball diameter, larger pitch, and larger chip thickness have bad effect on maximum yield stress and strain at solder ball of each chip.

• 한국전기전자재료학회논문지
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• 제32권1호
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• pp.47-52
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• 2019

Micro-LEDs show lower efficiencies compared to general LEDs having large areas. Simulations were carried out using ray-tracing software to investigate the change in light extraction efficiency and light distribution according to chip-size of blue flip-chip micro-LEDs (FC ${\mu}-LEDs$). After fixing the height of the square FC ${\mu}-LED$ chip at $158{\mu}m$, the length of one side was varied, with dimensions of 2, 5, 10, 30, 50, 100, 300, and $500{\mu}m$. The highest light-extraction efficiency was obtained at $10{\mu}m$, beyond which the efficiency decreased as the chip-size increased. The chip size-dependence of the FC ${\mu}-LEDs$ both without the patterned sapphire substrate, as well as vertical FC ${\mu}-LEDs$, were analyzed.

• Journal of electromagnetic engineering and science
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• 제11권4호
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• pp.282-289
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• 2011

GHz electromagnetic interference (EMI) characteristics are analyzed for a 3dimensional (3D) stacked chip power distribution network (PDN) with through silicon via (TSV) connections. The EMI problem is mostly raised by P/G (power/ground) noise due to high switching current magnitudes and high PDN impedances. The 3D stacked chip PDN is decomposed into P/G TSVs and vertically stacked capacitive chip PDNs. The TSV inductances combine with the chip PDN capacitances produce resonances and increase the PDN impedance level in the GHz frequency range. These effects depend on stacking configurations and P/G TSV designs and are analyzed using the P/G TSV model and chip PDN model. When a small size chip PDN and a large size chip PDN are stacked, the small one's impedance is more seriously affected by TSV effects and shows higher levels. As a P/G TSV location is moved to a corner of the chip PDNs, larger PDN impedances appear. When P/G TSV numbers are enlarged, the TSV effects push the resonances to a higher frequency range. As a small size chip PDN is located closer to the center of a large size chip PDN, the TSV effects are enhanced.

• Geomechanics and Engineering
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• 제15권3호
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• pp.811-822
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• 2018

Chip size distribution can be used to evaluate the cutting efficiency and to characterize the cutting behavior of rock during cutting and fragmentation process. In this study, a series of linear cutting tests was performed to investigate the effect of cutting conditions (specifically cut spacing and penetration depth) on the production and size distribution of rock chips. Linyi sandstone from China was used in the linear cutting tests. After each run of linear cutting machine test, the rock chips were collected and their size distribution was analyzed using a sieving test and image processing. Image processing can rapidly and cost-effectively provide useful information of size distribution. Rosin-Rammer distribution pamameters, the coarseness index and the coefficients of uniformity and curvature were determined by image processing for different cutting conditions. The size of the rock chips was greatest at the optimum cut spacing, and the size distribution parameters were highly correlated with cutter forces and specific energy.

• ETRI Journal
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• 제27권2호
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• pp.133-139
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• 2005

A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 ${\mu}$ gate-length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2mm${\times}$ 2mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1mm${\times}$ 2mm. The frequency doubler achieved an output power of -6 dBm at 76.5 GHz with a conversion gain of -16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2mm ${\times}$ 1.2mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W-band.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.470-480
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• 2016

The reversal of a silicon chip to find out its security structure is common and possible at the present time. Thanks to reversing, it is possible to use a probing attack to obtain useful information such as personal information or a cryptographic key. For this reason, security-related blocks such as DES (Data Encryption Standard), AES (Advanced Encryption Standard), and RSA (Rivest Shamir Adleman) engines should be located in the lower layer of the chip to guard against a probing attack; in this regard, the addition of a silicon-surface-protection layer onto the chip surface is a crucial protective measure. But, for manufacturers, the implementation of an additional silicon layer is burdensome, because the addition of just one layer to a chip significantly increases the overall production cost; furthermore, the chip size is increased due to the bulk of the secure logic part and routing area of the silicon protection layer. To resolve this issue, this paper proposes a practical silicon-surface-protection method using a metal layer that increases the security level of the chip while minimizing its size and cost. The proposed method uses a shift register for the alternation and variation of the metal-layer data, and the inter-connection area is removed to minimize the size and cost of the chip in a more extensive manner than related methods.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.609-610
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• 2006

A 77GHz MMIC transceiver module consisting of a power amplifier, a low noise amplifier, a drive amplifier, a frequency doubler and a down-mixer has been developed for automotive forward-looking radar sensor. The MMIC chip set was fabricated using $0.15{\mu}m$ gate-length InGaAs/InAlAs/GaAs mHEMT process based on 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20dB from $76{\sim}77GHz$ with 15.5dBm output power. The chip size is $2mm{\times}2mm$. The low noise amplifier achieved a gain of 20dB in a band between $76{\sim}77\;GHz$ with an output power of 10dBm. The chip size is $2.2mm{\times}2mm$. The driver amplifier exhibited a gain of 23dB over a $76{\sim}77\;GHz$ band with an output power of 13dBm. The chip size is $2.1mm{\times}2mm$. The frequency doubler achieved an output power of -16dBm at 76.5GHz with a conversion gain of -16dB for an input power of 10dBm and a 38.25GHz input frequency. The chip size is $1.2mm{\times}1.2mm$. The down-mixer demonstrated a measured conversion gain of over -9dB. The chip size is $1.3mm{\times}1.9mm$. The transceiver module achieved an output power of 10dBm in a band between $76{\sim}77GHz$ with a receiver P1dB of -28dBm. The module size is $8{\times}9.5{\times}2.4mm^3$. This MMIC transceiver module is suitable for the 77GHz automotive radar systems and related applications in W-band.

• 한국전자파학회논문지
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• 제16권1호
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• pp.102-112
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• 2005

본 논문에서는 CSP(Chip Size Package)를 이용하여 정합소자 및 모든 바이어스소자, ESD(Electrostatic Dis-charge) 보호소자를 MMIC상에 완전집적한 K/Ka밴드 광대역 MMIC chip set에 관하여 보고한다. CSP에 대해서는 이방성 도전필름인 ACF(Anisotropic Conductive Film)를 이용하였으며, 그 결과 MMIC 패키지 프로세스가 간략화 되었고, CSP MMIC의 저 가격화가 실현되었다. MMIC상에 집적하기 위한 DC 바이어스 용량소자로서는 고유전율의 $STO(SrTi_{3})$ 필름 커패시터가 이용되었으며, DC 피드소자와 ESD 보호소자로서는 LC 병렬회로가 사용되었다. 그리고, K/KA 밴드 광대역에 걸친 MMIC의 정합과 안정도를 위해서는 프리매칭회로와 RC 병렬회로가 이용되었으며, 제작된 CSP MMIC는 광대역(K/Ka) 밴드에서 양호한 RF 특성을 보였다. 본 논문은 K/Ka 밴드의 주파수 대역에 있어서의 완전집적화 CSP MMIC 칩셋에 관한 최초의 보고이다.

• 한국전기전자재료학회논문지
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• 제13권10호
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• pp.840-846
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• 2000

In this work, small-size, high-performance solenoid-type RF chip inductors utilizing a low-loss Al$_2$O$_3$core material were investigated. The size of the chip inductors fabricated in this work were 15$\times$10$\times$0.7㎣, 2.1$\times$1.5$\times$10㎣, and 2.4$\times$2.0$\times$1.4㎣ and copper (Cu) wire with 40 ㎛ diameter was used as the coils. High frequency characteristics of the inductance, quality factor, and impedance of developed inductors were measured suing an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). It was observed that the developed inductors with the number of turns of 7 have the inductance of 33 to 100nH and exhibit the self-resonant frequency (SRF) of .26 to 1.1 GHz. The SRF of inductors decreases with increasing the inductance and the inductors have the quality factor of 60 to 80 in the frequency range of 300 MHz to 1.1 GHz. In this study, small-size solenoid-type RF chip inductors with high inductance and high quality factor were fabricated successfully. It is suggested that the thin film-type inductor is necessary to fabricate the smaller size inductors at the expence of inductance and quality factor values.

• 한국진공학회지
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• 제21권4호
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• pp.185-192
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• 2012

Light Emitting Diode (LED) 칩의 크기는 전도를 통한 열의 방출에 있어 면적의 확대로 인한 열 밀도의 감소와 칩의 외부양자효율 변화로 인하여 LED 칩의 p-n 정션 온도와 패키지의 열 저항에 영향을 미친다. 본 연구에서는 16칩 LED 패키지에서 칩의 크기가 0.6 mm와 1 mm인 두 가지 경우에 대하여 순전압(forward voltage)을 측정하였고, 순간열분석법(thermal transient analysis)을 이용하여 정션 온도와 열 저항을 평가하였으며, 이를 LED 칩의 전기적인 특성과 LED 패키지의 구조적인 특성과 연관하여 해석하였다.