• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.259-262
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• 1999

This paper presents the design of highly efficient one-chip CMOS DC/DC converter. The converter operates at the switching frequency of 1MHz for reducing the size of passive elements. And use the zero voltage switching(ZVS) for minimizing switching loss at high frequency. The simulation shows that the circuit can achieve a 95% efficiency while delivering a load of 1W at 2V output.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.11 no.1
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• pp.114-122
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• 1997

This paper describes the design and development of a smart digital load cell used forweighing installations. Sice the load cell sensor to be used is very sensitive for weight cariation, the load cell must have the temperature stability, low-drift and the high-resolution of the A/D conversion for accuracy. A new analog circuit which is controlled by one chip micro-processer has been developed to reduce the offset voltage and the drift characteristics of operational amplifiers, and has been adapted into the digital load cell. Also, a software algorithm has been developed to obtain the stable and accurate A/D conversion. This software includes a RS-485 communication program to control the digital load cell, which gives a capability of backing-up the calibration data and transferring control data. The simulation and evaluation of the designed digital load cell has been shown as having the good performance. which will give useful application to the weighing installations as a remote weighing sensor.

• Proceedings of the KIEE Conference
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• 2000.11d
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• pp.644-646
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• 2000

According to the deregulations of governments in the world. the power industries of United State and European nations are proceeding remote meter reading and remote load control. But the core technology of multifunctional electronic meter implemented by programmable one-chip IC, which can be the right answer of all the power industy's efforts is now still under development in the advanced countries. Implementation of smallest size, lowest price single-phase meter with features which enable distribution automation such as bidirectional communication, Remote load control, remote meter reading, remote credit assigment. Prepayment billing system.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1996.11a
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• pp.754-758
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• 1996

This paper presents a new approach to the design of self-tuning adaptive control system that is robust to the changing dynamic configuration as well as to the load variation factors using Digital signal processors for robot manipulators. TMS320C50 is used in implementing real-time adaptive control algorithms to provide advanced performance for robot manipulator, In this paper, an adaptive control scheme is proposed in order to design the pole-placement self-tuning controller which can reject the offset due to any load disturbance without a detailed description of robot dynamics. Parameters of discrete-time difference model are estimated by the recursive least-square identification algorithm, and controller parameters we determined by the pole-placement method. Performance of self-tuning adaptive controller is illusrated by the simulation and experiment for a SCARA robot.

• Journal of Power Electronics
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• v.14 no.4
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• pp.796-805
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• 2014

A digital controller with a low-power approach for point-of-load synchronous buck converters is discussed and compared with its analog counterpart to confirm its feasibility for system integration. The tri-mode digital controller IC in $0.35{\mu}m$ CMOS process is presented to demonstrate solutions that include a PID, quarter PID, and robust RST compensators. These compensators address the steady-state, stand-by, and transient modes according to the system operating point. An idle-tone free condition for ${\Sigma}-{\Delta}$ DPWM reduces the inherent tone noise under DC-excitation. Compared with that of the traditional approach, this condition generates a quasi-pure modulation signal. Experimental results verify the closed-loop performances and confirm the power-saving mechanism of the proposed controller.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.450-452
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• 1993

In this study, a method is suggested to design the A/D conversion system which has high resolution to convert load cell signal. First, hardware was designed to reduce the offset voltage of integrator and comparator. And then, a calibration software technique was performed to obtain the stable data from A/D converter. The optimal parameters of each elements in the circuits was selected using the SPICE simulation. The main advantage of our method is high precision A/D converter can be constructed with low cost and high confidence. Therefore proposed method is expected to be used in the industrial field where a high precision measurement is required.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1627-1633
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• 2018

A constant voltage AC-DC converter based on digital assistant technology is proposed in this paper, which has rapid dynamic response capability. The converter operates in the PFM (Pulse Frequency Modulation) mode. According to the load state, the compensation current produced by the digital compensation module was injected into the CS pin to adjust the switching pulse width dynamically and improve the dynamic response. The control chip is implemented based on NEC $1{\mu}m$ 5V/40V HVCMOS process. A 5V/1.2A prototype has been built to verify the proposed control method. When the load jumps from idle to heavy, the undershoot time is only 7.4ms.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.35-40
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• 2012

In DC-DC converters, a PWM/PFM dual mode control method is commonly used to maintain a high efficiency over a wide range of load variation. Since the control mode is selected according to the load condition, the chip area is increased due to additional circuit for mode control and the optimum efficiency cannot be achieved around the mode transition point. To solve such problems, a new integrated control method is proposed in this paper, in which a PLL is used in the current mode PWM control circuit instead of an oscillator. The proposed integrated control method is verified through a design of a buck converter using PSIM simulation. Simulation of the complete buck converter circuit by Cadence Spectre showed a maximum efficiency of 94.7% at a load current of 250mA and an efficiency of 85.4% at a load current of 10mA under the light load condition.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1034-1046
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• 2011

In this paper, a design and fabrication of 40 W power amplifier for the X-band using load-pull measurement of GaN HEMT chip are presented. The adopted active device for power amplifier is GaN HEMT chip of TriQuint company, which is recently released. Pre-matched fixtures are designed in test jig, because the impedance range of load-pull tuner is limited at measuring frequency. Essentially required 2-port S-parameters of the fixtures for extraction optimal input and output impedances is obtained by the presented newly method. The method is verified in comparison of the extracted optimal impedances with data sheet. The impedance matching circuit for power amplifier is designed based on EM co-simulation using the optimal impedances. The fabricated power amplifier with 15${\times}$17.8 $mm^2$ shows the efficiency above 35 %, the power gain of 8.7~8.3 dB and the output power of 46.7~46.3 dBm at 9~9.5 GHz with pulsed-driving width of 10 usec and duty of 10 %.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.9
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• pp.3428-3434
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• 2010

In this paper, we proposed and implemented a quality measurement algorithm for IS-95 reverse-link signal. To measure the quality of the received signal, equalization, carrier frequency/phase offset estimation, and timing synchronization are essential. And, all signal processing are carried out with baseband signal. The equalizer works with 4-oversampled samples to remove ICI(InterChip Interference). The frequency/phase offset estimator is followed by timing synchronizer since it can work without aid of data and timing information. As the number of interpolation in timing synchronization increases, the measurement accuracy improves, but computation load increases simultaneously. Therefore, one need to choose adequately the number of interpolation regarding to the platform performance to be used for the proposed algorithm.