• Title/Summary/Keyword: Chip load

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Low Power Digital Servo Architecture for Optical Disc (광디스크 디지털 서보의 저전력 구현 아키텍쳐)

  • Huh, Jun-Ho;Kim, Soo-Won
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.38 no.2
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    • pp.31-37
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    • 2001
  • Digital servo implementation in optical servo chip has been spotlighted since it is easy to integrate with other blocks and it has less sensitive characteristics change in terms of temperature variation and better flexibility to the system variation like pick-up. Therefore, Optical disc players adopted digital servo are increasing in market. However, one drawback of digital signal processor embedded digital servo is power consumption that is one of the most important factors of portable optical disc player system. For that reason, this paper introduces new architecture to reduce power consumption of digital servo by means of reducing DSP load but increasing minimum hardware size. The main idea of reducing power consumption of digital servo greatly is utilizing CDP characteristics as most operations are done and used up most operating steps of DSP at the initial time, but most power consumption is occurred in play mode. Therefore, if operating steps for digital filtering in play mode could be reduced greatly, power consumption of overall system can be reduced greatly. This paper shows an example that low power digital servo architecture whose current is reduced almost 83%, compare to that of digital servo which is not applied by the low power architecture introduced in this paper.

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Evaluation of Weighted Correlator for Multipath Mitigation in GPS Receiver (GPS수신기의 다중경로 오차 제거를 위한 가중 상관기의 성능평가)

  • Shin, Mi-Young;Jang, Han-Jin;Suh, Sang-Hyun;Park, Chan-Sik;Hwang, Dong-Hwan;Lee, Sang-Jeong
    • Journal of Navigation and Port Research
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    • v.31 no.5 s.121
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    • pp.409-414
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    • 2007
  • The effect of multipath is especially serious in urban area and sea surface where buildings and water reflect GPS signal. Multipath brings about the performance degradation on many GPS application because the presence of multipath causes the diminution of pseudorange measurement accuracy in turn position accuracy. In this paper, a multipath mitigation named weighted correlation method is implemented on software GPS receiver, in which the asymmetric correlation function is compensated by modifying the late correlation value. Asymmetry compensation is obtained as weighted sum of two correlators which have different early-late chip spaces. This structure is adopted to lessen the computation load lower keeping up performance similar to that. The performance of implemented multipath mitigation technique is evaluated using GPS signal and multipath signal generated by GPS signal generator and software GPS receiver. The test results show that the weighted correlation method gives hefter performance than the standard correlator and the narrow correlator.

A 0.18-um CMOS 920 MHz RF Front-End for the IEEE 802.15.4g SUN Systems (IEEE 802.15.4g SUN 표준을 지원하는 920 MHz 대역 0.18-um CMOS RF 송수신단 통합 회로단 설계)

  • Park, Min-Kyung;Kim, Jong-Myeong;Lee, Kyoung-Wook;Kim, Chang-Wan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.423-424
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    • 2011
  • This paper has proposed a 920 MHz RF front-end for IEEE 802.15.4g SUN (Smart Utility Network) systems. The proposed 920 MHz RF front-end consists of a driver amplifier, a low noise amplifier, and a RF switch. In the TX mode, the driver amplifier has been designed as a single-ended topology to remove a transformer which causes a loss of the output power from the driver amplifier. In addition, a RF switch is located in the RX path not the TX path. In the RX mode, the proposed low noise amplifier can provide a differential output signal when a single-ended input signal has been applied to. A LC resonant circuit is used as both a load of the drive amplifier and a input matching circuit of the low noise amplifier, reducing the chip area. The proposed 920 MHz RF Front-end has been implemented in a 0.18-um CMOS technology. It consumes 3.6 mA in driver amplifier and 3.1 mA in low noise amplifier from a 1.8 V supply voltage.

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A Micro-Scale Photovoltaic Energy Harvesting Circuit Using Energy Distribution Technique (에너지 분배 기능을 이용한 마이크로 빛에너지 하베스팅 회로)

  • Lee, Shin-woong;Lee, Chul-woo;Yang, Min-Jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.581-584
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    • 2014
  • In this paper, a micro-scale photovoltaic(PV) energy harvesting system is proposed where an MPPT(Maximum Power Point Tracking) control is implemented using an energy distribution technique. Miniature PV cells output very low energy and low voltages, and thus, they cannot be used to directly power the MPPT controller. In the proposed system, a start-up circuit boosts an internal Vcp, and the boosted Vcp is used to operate the internal MPPT control block. When the Vcp reaches a predefined value, a detector circuit makes the start-up block turn off and provide a power converter with the energy from the PV cell. When the Vcp decreases such that the MPPT controller can not be operated, the energy transferred to the power converter is blocked and the start-up circuit is reactivated. In this way, the MPPT function is achieved by alternately operating the start-up circuit and the power converter using the energy distribution technique, and the harvested energy is transferred to a load through a PMU(Power Management Unit). The proposed circuit is designed in a 0.35um CMOS process and its functionality has been verified through extensive simulations. The designed chip area including pads is $1430um{\times}1110um$.

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A Study on the Power Converter Control of Utility Interactive Photovoltaic Generation System (계통 연계형 태양광 발전시스템의 전력변환기 제어에 관한 연구)

  • Na, Seung-Kwon;Ku, Gi-Jun;Kim, Gye-Kuk
    • Journal of the Korea Society of Computer and Information
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    • v.14 no.2
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    • pp.157-168
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    • 2009
  • In this paper, a photovoltaic system is designed with a step up chopper and single phase PWM(Pulse Width Modulation) voltage source inverter. Where proposed Synchronous signal and control signal was processed by one-chip microprocessor for stable modulation. The step up chopper operates in continuous mode by adjusting the duty ratio so that the photovoltaic system tracks the maximum power point of solar cell without any influence on the variation of insolation and temperature because solar cell has typical voltage and current dropping character. The single phase PWM voltage source the inverter using inverter consists of complex type of electric power converter to compensate for the defect, that is, solar cell cannot be developed continuously by connecting with the source of electric power for ordinary use. It can cause the effect of saving electric power. from 10 to 20[%]. The single phase PWM voltage source inverter operates in situation that its output voltage is in same phase with the utility voltage. In order to enhance the efficiency of photovoltaic cells, photovoltaic positioning system using sensor and microprocessor was design so that the fixed type of photovoltaic cells and photovoltaic positioning system were compared. In result, photovoltaic positioning system can improved 5% than fixed type of photovoltaic cells. In addition, I connected extra power to the system through operating the system voltage and inverter power in a synchronized way by extracting the system voltage so that the phase of the system and the phase of single-phase inverter of PWM voltage type can be synchronized. And, It controlled in order to provide stable pier to the load and the system through maintaining high lurer factor and low output power of harmonics.