• Title/Summary/Keyword: Chip crack

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Visco-Elastic Fracture Analysis of IC Package under Thermal Loading (열하중하에 있는 IC 패키지의 점탄성 파괴해석)

  • 이강용;양지혁
    • Journal of the Korean Society for Precision Engineering
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    • v.15 no.1
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    • pp.43-50
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    • 1998
  • The purpose of the paper is to protect the damage of plastic IC package with searching the cause of the fracture due to the delamination and crack when the encapsulant of plastic IC package is on viscoelastic behavior with the effect of creep on high temperature, The model for analysis is the plastic SOJ package with dimpled diepad in the IR soldering process of surface mounting technology. The risk of delamination with calculating the distribution of viscoelastic thermal stress in the package without the crack in the surface mounting process is checked. The package model with the perfect delamination between chip and diepad is chosen to estimate the resistance against fracture in thermal loading with calculating C (t)-integrals according to the change of the design. The optimum design to depress the delamination and crack is presented.

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Effects of High Temperature-moisture on Corrosion and Mechanical Properties for Sn-system Solder Joints (고온고습환경이 Sn계 무연솔더의 부식 및 기계적 특성에 미치는 영향)

  • Kim, Jeonga;Park, Yujin;Oh, Chul Min;Hong, Won Sik;Ko, Yong-Ho;Ahn, Sungdo;Kang, Namhyun
    • Journal of Welding and Joining
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    • v.35 no.3
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    • pp.7-14
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    • 2017
  • The effect of high temperature-moisture on corrosion and mechanical properties for Sn-0.7Cu, Sn-3.0Ag-0.5Cu (SAC305) solders on flexible substrate was studied using Highly Accelerated Temperature/Humidity Stress Test (HAST) followed by three-point bending test. Both Sn-0.7Cu and SAC305 solders produced the internal $SnO_2$ oxides. Corrosion occurred between the solder and water film near flexible circuit board/copper component. For the SAC305 solder with Ag content, furthermore, octahedral corrosion products were formed near Ag3Sn. For the SAC305 and Sn-0.7Cu solders, the amount of internal oxide increased with the HAST time and the amount of internal oxides was mostly constant regardless of Ag content. The size of the internal oxide was larger for the Sn-0.7Cu solder. Despite of different size of the internal oxide, the fracture time during three-point bending test was not significantly changed. It was because the bending crack was always initiated from the three-point corner of the chip. However, the crack propagation depended on the oxides between the flexible circuit board and the Cu chip. The fracture time of the three-point bending test was dependent more on the crack initiation than on the crack propagation.

A Study on Noise Resistance and Physical Properties of NBR Rubber Materials Containing Oleamide and Aramid Chip (Oleamide 및 아라미드 칩을 첨가한 NBR 고무재료의 내소음성 및 물성 연구)

  • Kim, Hyun-Muk;Lee, Chang-Seop
    • Elastomers and Composites
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    • v.41 no.2
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    • pp.79-87
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    • 2006
  • This study are conducted for the purpose of developing rubber material with noise and crack resistance. Cure characteristics, physical properties, thermal resistance, fuel resistance, abrasion resistance, crack resistance and noise resistance of NBR compounds with the various amounts of oleamide and aramid chip were investigated. From the measurements of cure characteristics and Mooney viscosities, cure characteristics of uncured rubber showed that a torque was decreased as the amount of oleamide increased. Hardness, modulus and elongation of rubber specimens tended to be reduced gradually, however, tensile strength remained unchanged as the amount of the oleamide increased. As a testing results of heat resistance for 70 hours at $120^{\circ}C$ and oil resistance far 70 hours at $40^{\circ}C$, tensile strength and elongation were all reduced. From the TGA/DSC analysis, there was no such a change observed in thermal characteristics of rubber materials. As a result of testing basic physical properties, abrasion resistance, noise resistance and crack resistance, the optimum ratio of oleamide to NBR was found to be 3 phr, while that of aramid to NBR 227001 was 1 phr.

Development of Heterojunction Electric Shock Protector Device by Co-firing (동시소성형 감전소자의 개발)

  • Lee, Jung-soo;Oh, Sung-yeop;Ryu, Jae-su;Yoo, Jun-seo
    • Korean Journal of Materials Research
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    • v.29 no.2
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    • pp.106-115
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    • 2019
  • Recently, metal cases are widely used in smart phones for their luxurious color and texture. However, when a metal case is used, electric shock may occur during charging. Chip capacitors of various values are used to prevent the electric shock. However, chip capacitors are vulnerable to electrostatic discharge(ESD) generated by the human body, which often causes insulation breakdown during use. This breakdown can be eliminated with a high-voltage chip varistor over 340V, but when the varistor voltage is high, the capacitance is limited to about 2pF. If a chip capacitor with a high dielectric constant and a chip varistor with a high voltage can be combined, it is possible to obtain a new device capable of coping with electric shock and ESD with various capacitive values. Usually, varistors and capacitors differ in composition, which causes different shrinkage during co-firing, and therefore camber, internal crack, delamination and separation may occur after sintering. In addition, varistor characteristics may not be realized due to the diffusion of unwanted elements into the varistor during firing. Various elements are added to control shrinkage. In addition, a buffer layer is inserted in the middle of the varistor-capacitor junction to prevent diffusion during firing, thereby developing a co-fired product with desirable characteristics.

A Fracture Mechanics Approach on Delamination and Package Crack in Electronic Packaging(l) -Delamination- (반도체패키지에서의 층간박리 및 패키지균열에 대한 파괴역학적 연구 (1) -층간박리-)

  • 박상선;반용운;엄윤용
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.18 no.8
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    • pp.2139-2157
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    • 1994
  • In order to understand the delamination between leadframe and epoxy molding compound in an electronic packaging of surface mounting type, the stress intensity factor, T-stress and J-integral in fracture mechanics are obtained. The effects of geometry, material properties and molding process temperature on the delamination are investigated taking into account the temperature dependence of the material properties, which simulates as more realistic condition. As the crack length increases the J-integral increases, which suggest that the crack propagates if it starts growing from the small size. The effects of the material properties and molding process temperature on stress intensity factor, T-stress is and J-integral are less significant than the chip size for the practical cases considered here. The T-stress is negative in all eases, which is in agreement with observation that interfacial crack is not kinked until the crack approaches the edge of the leadframe.

Hygrothermal Cracking Analysis of Plastic IC Package (플라스틱 IC 패키지의 습열 파괴 해석)

  • 이강용;양지혁
    • Journal of the Korean Society for Precision Engineering
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    • v.15 no.1
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    • pp.51-59
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    • 1998
  • The purposes of the paper are to consider the failure phenomenon based on delamination and crack when the encapsulant of plastic IC package under hygrothermal loading in the IR soldering process is on elastic and viscoelastic behavior due to the temperature and to show the optimum design using fracture mechanics. The model for analysis is the plastic SOJ package with a dimpled diepad. The package model with the perfect delamination between chip and diepad is chosen to estimate the resistance to fracture by calculating J-integrals in low temperature and C(t)-integrals in high temperature with the change of the design under hygrothermal loading. The optimum design to depress the delamination and crack in the plastic IC package is presented.

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Optimum Design of Bonding Pads for Prevention of Passivation Damage in Semiconductor Devices Utilizing Lead-on-Chip (LOC) Die Attach Technique (리드 온 칩 패키징 기술을 이용하여 조립된 반도체 제품에서 패시베이션 파손을 막기 위한 본딩패드의 합리적 설계)

  • Lee, Seong-Min;Kim, Chong-Bum
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.69-73
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    • 2008
  • This article shows that the susceptibility of the device pattern to thermal stress-induced damage has a strong dependence on its proximity to the device comer in semiconductor devices utilizing lead-on-chip (LOC) die attach technique. The result, as explained based on numerical calculation and experiment, indicateds that the stress-driven damage potential of the passivation layer is the highest at the device comer. Thus, the bonding pads, which are very susceptible to passivation damage, should be designed to be located along the central region rather than the peripheral region of the device.

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Study on Joint of Micro Solder Bump for Application of Flexible Electronics (플렉시블 전자기기 응용을 위한 미세 솔더 범프 접합부에 관한 연구)

  • Ko, Yong-Ho;Kim, Min-Su;Kim, Taek-Soo;Bang, Jung-Hwan;Lee, Chang-Woo
    • Journal of Welding and Joining
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    • v.31 no.3
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    • pp.4-10
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    • 2013
  • In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

A Study on Method of Construction for Foamed Concrete adding EVA Chip that improves the Resistance of Cracking and Capability of Insulating (크랙저항성(抵抗性)과 단열성(斷熱性)을 향상(向上)시킨 EVA칩 첨가 기포콘크리트의 려공법(旅工法) 연구(硏究))

  • Lee, Jong-Shik;An, Jung-Chan;Lee, Jong-Hak
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2007.11a
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    • pp.5-9
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    • 2007
  • The construction method for Foamed-Concrete has not been important due to following process of construction work. However, according to the code about enhance of energy saving design policy and impact noise, noised isolation has been used in construction site so that the resistance for cracking and capability for insulating of Foamed-Concrete has been required. Therefore, new alternatives are demanded. Optimum mixing design, which can get the improvement of insulation and resistance of crack for Foamed-Concrete adding EVA chip, was derived and also the device, applying to construction site, was invented to equalize quality. This device can measure quantity of all input and placement, and show up the sum of placement and mixing design on a touch screen. This valuable construction method is friendly environment and recycling method because of using EVA chip, by-product of an EVA insole scrap burned or embedded, as a light-weight aggregate.

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