• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.7
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• pp.571-575
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• 2017

This paper presents a C-band bi-directional T/R chipset in $0.13{\mu}m$ TSMC CMOS technology for phased array antenna. The T/R chipset, which is a key component of phased array antenna, consists of a 6 bit phase shifter, a 6 bit step attenuator, and three bi-directional gain amplifiers. The phase shifter is controlled up to $354^{\circ}$ with $5.625^{\circ}$ phase step for precise beam steering. The step attenuator is also controlled up to 31.5 dB with 0.5 dB attenuation step for the side lobe level rejection. The LDO(Low Drop Output) regulator for stable 1.2 V DC power and the SPI(Serial Peripheral Interface) for digital control are integrated in the chipset. The chip size is $2.5{\times}1.5mm^2$ including pads.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.8
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• pp.79-85
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• 2004

In this paper, the RF-ID system for ubiquitous tagging applications has been designed, fabricated and analysed. The RF-ID System consists of passive RF-ID Tag and Reader. The passive RF-ID tag consists of rectifier using zero-bias schottky diode which converts RF power into DC power, ID chip, ASK modulator using bipolar transistor and slot loop antenna. We suggest an ASK undulation method using a bipolar transistor to compensate the disadvantage of the conventional PIN diode, which needs large current Also, the slot loop antenna with wider bandwidth than that of the conventional patch antenna is suggested The RF-ID reader consist of patch array antenna, Tx/Rx part and ASK demodulator. We have designed the RF-ID System using EM and circuit simulation tools. According to the measured results, The power level of modulation signal at 1 m from passive RF-ID Tag is -46.76 dBm and frequency of it is 57.2 KHz. The transmitting power of RF-ID reader was 500 mW

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.502-505
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• 2011

In this paper, A Design of 2.45GHz and GPS antenna Integrated Board using Container security Device(ConTracer) for container cargo transportation is proposed and experimentally evaluate. Integrated antenna board include 2.4GHz chip and Ceramic GPS antenna is also consider the impact of RF interference based on simulation for applied to steel container. After a careful comparison and analysis a part of the container door for its best performance, We conduct tests to characterize. The proposed integrated antenna board is suitable for container cargo transportation application in steel container field.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.7
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• pp.678-685
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• 2013

In this paper, we propose a design of dual-band patch antennas for Global Positioning System(GPS) applications, and the designed antenna is used as an individual element of GPS arrays. A low distortion and a high isolation of the array are achieved by adjusting rotating angles of each array element. The antenna consists of two radiating patches that operate in the GPS $L_1$ and $L_2$ bands, and the two ports feeding network with a hybrid chip coupler is adopted to achieve a broad circular polarization(CP) bandwidth. The rotating angles of each antenna element are varied with four directions(${\phi}=0^{\circ}$, ${\phi}=90^{\circ}$, ${\phi}=180^{\circ}$, ${\phi}=270^{\circ}$) in order to minimize the pattern distortion and maximize the isolation among array elements. The measurement shows bore-sight gains of 0.3 dBic($L_1$) and -1.0 dBic($L_2$) for the center element. Bore-sight gains of 1.6 dBic($L_1$) and 1.0 dBic($L_2$) are observed for the edge element. This results demonstrate that the proposed antenna is suitable for GPS array applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.12B
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• pp.1452-1458
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• 2009

In this paper, Our proposed Multipurpose Complex Card UHF band RFID small-size Tag antenna. Multi purpose Complex Card UHF band RFID small-size Tag antenna that is to minimize the low efficiency of RFID Tag Read Range that generates space limitation and a conductor surrounded by inducing fingerpring system with dual(HF, UHF) Card is presented. Our proposed UHF band RFID small-size Tag antenna is for the Multipurpose Complex Card that is mounted on the fingerpring system as well as the HF Tag. It also enables to minimize and facilitates Tag chip matching by adjusting Tapered, Meander line and Loop structure. Given the card substance properties and periphery circuit, the proposed small-size Tag antenna, in this report, is designed with PET film with size of $50{\times}15mm^2$. The RFID small-size Tag method for measurements is used by EPCglobal Static Test instrument in Anechoic Chamber, which is tested with dual Card, within the car and in wallet. It is found that Read Range is 3.8m from the EPCglobal Static Test, Maximum Read Range within the car from the field test results in 7.6m. Proposed Tag antenna is will be used in the parking control security system.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.1
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• pp.60-63
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• 2009

In this paper, Designed and implemented about module that generate division signal for uplink section and downlink section for controlling Tx/Rx antenna of 2.3-2.7GHz WiMAX TDD repeater. It is consisted of RF block and Baseband block, and because function of this module is that synchronize with WiMAX signal and create division signal for uplink section and downlink section, this module was designed only received path. And because of manufacturing of most RF block by one chip, this module could minimize area. And in baseband block, used the WiMAX Modem to detect Preamble and DL-MAP information of WiMAX signal. This design can process about 2.3-2.7GHz WiMAX.

• Journal of electromagnetic engineering and science
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• v.4 no.4
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• pp.183-189
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• 2004

In this paper, the Eigen-RAKE receiver in wideband direct sequence code-division multiple access(DS-CDMA) systems with downlink smart antenna is analyzed for different spreading bandwidths(1.25 MHz, 5 MHz, 10 MHz) and different channel environments(macro, micro). The realistic spatio-temporal wideband multipath channel is assumed, one of which is standardized multiple-input single-output(MISO) radio channel model for WCDMA link-level simulations proposed by $3^{rd}$ generation partnership project(3GPP) contributions. We assumed spatial scattering phenomenon in which many unresolvable path signals within a limited range of spatial angle simultaneously contribute to the signals received at the receiver. Several multipaths within one chip are distinguished into each one and the first multipath components are selected as the desired signal and the others are considered self-interference. Downlink DS-CDMA system with eigenbeamformer using wider bandwidth present better performance than that using narrow bandwidth system by employing Eigen-RAKE receiver of many number of branches. It is shown that the downlink eigenbeamformer is more effective in typical urban macro cellular environments when using Eigen-RAKE receiver.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.511-519
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• 2016

This paper proposes a CMOS 6-bit phase shifter with low RMS phase and amplitude errors for an X-band phased array antenna. The phase shifter combines a switched-path topology for coarse phase states and a switch-filter topology for fine phase states. The coarse phase shifter is composed of phase shifting elements, single-pole double-throw (SPDT), and double-pole double-throw (DPDT) switches. The fine phase shifter uses a switched LC filter. The phase coverage is $354.35^{\circ}$ with an LSB of $5.625^{\circ}$. The RMS phase error is < $6^{\circ}$ and the RMS amplitude error is < 0.45 dB at 8-12 GHz. The measured insertion loss is < 15 dB, and the return losses for input and output are > 13 dB at 8-12 GHz. The input P1dB of the phase shifter achieves > 11 dBm at 8-12 GHz. The current consumption is zero with a 1.2-V supply voltage. The chip size is $1.46{\times}0.83mm^2$, including pads.

• ETRI Journal
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• v.35 no.4
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• pp.638-643
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• 2013

This paper presents a 5-bit digital step attenuator (DSA) using a commercial 0.18-${\mu}m$ silicon-on-insulator (SOI) process for the wideband phased array antenna. Both low insertion loss and low root mean square (RMS) phase error and amplitude error are achieved employing two attenuation topologies of the switched path attenuator and the switched T-type attenuator. The attenuation coverage of 31 dB with a least significant bit of 1 dB is achieved at DC to 20 GHz. The RMS phase error and amplitude error are less than $2.5^{\circ}$ and less than 0.5 dB, respectively. The measured insertion loss of the reference state is less than 5.5 dB at 10 GHz. The input return loss and output return loss are each less than 12 dB at DC to 20 GHz. The current consumption is nearly zero with a voltage supply of 1.8 V. The chip size is $0.93mm{\times}0.68mm$, including pads. To the best of the authors' knowledge, this is the first demonstration of a low phase error DC-to-20-GHz SOI DSA.

• ETRI Journal
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• v.40 no.6
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• pp.693-698
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• 2018

This paper presents a true-time delay (TTD) using a commercial $0.13-{\mu}m$ CMOS process for wideband phased-array antennas without the beam squint. The proposed TTD consists of four wideband distributed gain amplifiers (WDGAs), a 7-bit TTD circuit, and a 6-bit digital step attenuator (DSA) circuit. The T-type attenuator with a low-pass filter and the WDGAs are implemented for a low insertion loss error between the reference and time-delay states, and has a flat gain performance. The overall gain and return losses are >7 dB and >10 dB, respectively, at 2 GHz-18 GHz. The maximum time delay of 198 ps with a 1.56-ps step and the maximum attenuation of 31.5 dB with a 0.5-dB step are achieved at 2 GHz-18 GHz. The RMS time-delay and amplitude errors are <3 ps and <1 dB, respectively, at 2 GHz-18 GHz. An output P1 dB of <-0.5 dBm is achieved at 2 GHz-18 GHz. The chip size is $3.3{\times}1.6mm^2$, including pads, and the DC power consumption is 370 mW for a 3.3-V supply voltage.