• Journal of IKEEE
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• v.25 no.1
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• pp.180-192
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• 2021

One widely used algorithm for image recognition and pattern detection is the convolution neural network (CNN). To efficiently handle convolution operations, which account for the majority of computations in the CNN, we use hardware accelerators to improve the performance of CNN applications. In using these hardware accelerators, the CNN fetches data from the off-chip DRAM, as the massive computational volume of data makes it difficult to derive performance improvements only from memory inside the hardware accelerator. In other words, data communication between off-chip DRAM and memory inside the accelerator has a significant impact on the performance of CNN applications. In this paper, a simulator for the CNN is developed to analyze the main memory or DRAM access with respect to the size of the on-chip memory or global buffer inside the CNN accelerator. For AlexNet, one of the CNN architectures, when simulated with increasing the size of the global buffer, we found that the global buffer of size larger than 100kB has 0.8x as low a DRAM access count as the global buffer of size smaller than 100kB.

• Journal of the Korean Wood Science and Technology
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• v.43 no.2
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• pp.186-195
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• 2015

This study aims at modeling the rotary drying of wood chips in co-current mode and estimating the drying time of larch (Larix kaemferi) wood chip. Drying data were obtained in a lab. scale fixed bed dryer operating with an air velocity of 1 m/sec. and at hot air inlet temperatures of $100^{\circ}C$, $200^{\circ}C$, and $300^{\circ}C$. The lab. scale fixed-bed drying rates for small, medium and large size larch wood chips that had been dried from 40% wet-based moisture content (MC) to 10% MC at $200^{\circ}C$ drying temperature were 17.3 %/min., 10.2 %/min. and 5.5 %/min., respectively. It was predicted that larch large size wood chips could be dried from 40% MC to 10% MC in about 23.0, 34.6, and 44.7 minutes at $300^{\circ}C$, $200^{\circ}C$ and $150^{\circ}C$, respectively. Expected drying times for medium size chips were about 8.6, 11.2 and 13.2 minutes and those for small size chips were 4.3, 5.5 and 6.4 minutes, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.854-857
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• 2005

We developed new circuit architecture for reducing the power consumption and chip-size of driver ICs. In this paper we describe a new drive scheme, based on the concept of time -sharing output and optimal circuit design based on color resolution. In case of 132 x 176-pixel class, we used only 8 O p-A mps for a 262-k color display.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.782-785
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• 2002

Power amplifier of wireless communication tranceiver can be effectually controlled output power. And small size and low power dissipation are indispensable to portable system. In this paper, to reduce the size of portable tranceiver, inductor is integrated in a single chip. And to reduce power dissipation, a power amplifier that can be digitally controlled output power, is proposed and designed.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.193-215
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• 2003

Fracture Mechanism of Flip Chip Electromigration Failure - Mostly caused by Cathode Depletion at the UBM/Solder Interface Guideline to Increase Electromigration Resistance Material Selection: Sn/Ag(/Cu) > Pb/63Sn Cu UBM > Ni UBM (but, Solder Material combination) UBM Design: thick UBM is preferable (but, Stress Issue) Pad open/UBM size: as large as possible (but, pad size & pitch limit)

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.8
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• pp.1733-1739
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• 1997

An ultra-compact milimeter-wave broadband MMIC amplifier was designed using a direct-coupled topology combined with optimum feedback design. Significant reductionin the chip size was possible by employing the direct-coupled topology. Bias resistors required for the direct-coupled topology were also used as feedback elements. Feedback was optimized for millimeter-wave frequencies using reactive elements. The fabricated MMIC amplifier was realized in a chip size of 0.8mm$^{[-992]}$ and showed gains higher than 8 dB from 12 to 44 GHz. An output power of 30mW was achieved at 44 GHz with a drain efficiency of 10%.

• Elastomers and Composites
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• v.58 no.2
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• pp.87-94
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• 2023

Abrasion tests of an SBR compound were conducted using four different types of abrasion testers (cut and chip, Lambourn, DIN, and LAT100). The abrasion test results were analyzed in terms of size distributions and morphologies of the wear particles. Most wear particles were larger than 1000 ㎛. The wear particle size distributions tended to decrease as the particle size decreased. Except for the Lambourn abrasion test, the wear particles smaller than 212 ㎛ were rarely generated by the other three abrasion tests, implying that small wear particles were produced through friction by introducing talc powder. Shapes of the wear particles varied depending on the abrasion testers. The wear particles generated from the Lambourn abrasion tester had stick-like shapes. The cut and chip abrasion test showed a clear abrasion pattern, but the DIN abrasion test did not show any specific abrasion pattern. The Lambourn and LAT100 abrasion tests showed irregular abrasion patterns.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.1663-1667
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• 2003

This thesis is on tile development of LD(Laser Diode) chip tester and the control system based on graphical programming language(LabVIEW) to control the equipment. The LD chip tester is used to test the optic power and the optic spectrum of the LD Chip. The emitter size of LD chip and the diameter of the receiver(optic fiber) are very small. Therefore, in order to test each chip precisely, this tester needs high accuracy. However each motion part of the tester could not accomplish hish accuracy due to the limit of the mechanical performance. Hence. an image processing with machine vision was carried out in order to compensate for the error. and also a load test was carried out so as to reduce tile impact of load on chip while the probing motion device is working. The obtained results were within ${\pm}$5$\mu\textrm{m}$ error.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.5
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• pp.47-52
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• 2004

In this paper we fabricated microchip antenna operating in bluetooth frequency bands(2.402∼2.4800㎓). The antenna has a size of about 54mm${\times}$19mm${\times}$0.8mm giving a total bluetooth PCB for suuort and chip of about 11mm${\times}$4mm${\times}$1.6mm. Bandwidth of the designed and fabricated chip antenna for bruetooth is 10.71% at the resonated frequency of 2.45㎓ and the resonant frequency and bandwidth versus change of my arbitrary fled point is observed. also, E-plane and H-plane in the Measured radiation pattern characteristic of chip antenna is compared and analyzed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.107-112
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• 2009

This paper describes design and fabrication issues of the SiP(System in Package) one-chip for a portable digital broadcasting receiver. It includes RF tuner chip, demodulator chip and passive components for the receiver system. When we apply the SiP one-chip technology to the broadcasting receiver, the system board size can be reduced from $776mm^2$ to $144mm^2$. SiP one-chip has an advantage that the area reduces more 81% than separated chips. Also the sensitivity performance advances -1dBm about 36 channels in the RF weak electric field, the power consumption reduces about 2mW and the C/N keeps on the same level.