• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.14 no.9
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• pp.749-755
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• 2002

In order to develop a multi-type heat pump system with two indoor units of non-uniform capacities, the optimum refrigerant circuit was developed using capillary tubes. The refrigerant circuit was composed of four main parts, a heating circuit, a cooling circuit, a by-pass circuit and a balance circuit. The system characteristics of multi-type heat pump was investigated through the rating test and the reliability test, using the multi-type psy-chrometric calorimeter. The results of the rating test showed that the capacity of the multi-type heat pump was about 93% of the design value. In particular, the capacity of cooling single mode was about 13% higher than the design value, and the capacity of heating multi mode was about 5% higher than the design value. The reliability of the multi-type heat pump was verified by various reliability tests (overload, extension tube, freeze up, under/over charging, sweat, flood back). The optimal amount of refrigerant charge and compressor capacity were determined from the present work.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.7 s.337
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• pp.35-40
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• 2005

This paper proposes a fractional-N phase-locked loop (PLL) frequency synthesizer using the 3rd order ${\Delta}{\sum}$ modulator for 900MHz medium speed wireless link. The LC voltage-controlled oscillator (VCO) is used for the good phase noise property. To reduce the lock-in time, a charge pump has been developed to control the pumping current according to the frequency steps and the reference frequency is increased up to 3MHz. A 36/37 fractional-N divider is used to increase the reference frequency of the phase frequency detector (PFD) and to reduce the minimum frequency step simultaneously. A 3rd order ${\Delta}{\sum}$ modulator has been developed to reduce the fractional spur VCO, Divider by 8 Prescaler, PFD and Charge pump have been developed with 0.25um CMOS, and the fractional-N divider and the third order ${\Delta}{\sum}$ modulator have been designed with the VHDL code, and they are implemented through the FPGA board of the Xilinx Spartan2E. The measured results show that the output power of the PLL is about -lldBm and the phase noise is -77.75dBc/Hz at 100kHz offset frequency. The minimum frequency step and the maximum lock-in time are 10kHz and around 800us for the maximum frequency change of 10MHz, respectively.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.5
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• pp.359-369
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• 2020

In this paper, we proposed a charge pump (CP) circuit that has a wide operating range while reducing the current mismatch for the PLL that generates the main clock of the CMOS X-Ray detector. The operating range and current mismatch of the CP circuit are determined by the characteristics of the current source circuit for the CP circuit. The proposed CP circuit is implemented with a wide operating current mirror bias circuit to secure a wide operating range and a cascode structure with a large output resistance to reduce current mismatch. The proposed wide operating range cascode CP circuit was fabricated as a chip using a 350nm CMOS process, and current matching characteristics were measured using a source measurement unit. At this time, the power supply voltage was 3.3 V and the CP circuit current ICP = 100 ㎂. The operating range of the proposed CP circuit is △VO_Swing=2.7V, and the maximum current mismatch is 5.15 % and the maximum current deviation is 2.64 %. The proposed CP circuit has low current mismatch characteristics and can cope with a wide frequency range, so it can be applied to systems requiring various clock speed.

• Progress in Superconductivity and Cryogenics
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• v.6 no.2
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• pp.29-34
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• 2004

The linear type flux pump aims to compensate a little bit decremental persistent current of the HTS magnet in NMR and MRI spectrometers. The flux pump mainly consists of DC bias coil, 3-phase AC coil and Nb foil. The persistent current in closed superconductive circuit can be easily adjusted by the 3-phase AC current, its frequency and the DC bias current. In the experiment, it has been investigated that the flux pump can effectively charge the current in the load coil of 543 mH for various frequencies in 18 minutes under the DC bias of 10 A and the AC of 5 $A_{rms}$. The maximum magnitudes of pumping current and load magnet voltage are 0.72 A/min and 20 ㎷, respectively. Based on simulation results by the FEM are proved to nearly agree with experimental ones.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.669-673
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• 2005

World geothermal resources potential is estimated to supply 189 EJ annually, which can take charge approximately a half of annual world energy consumpt ion, from considering identified resources and supplies in USA and Iceland. Present annual use of geothermal energy, on the other hand, is only $0.1\%$ of its potential, but still has $70\%$ share among total new renewables. World-wide installed capacity of geothermal power generation reaches 8,900 MWe and 27,825 MWt for direct uses in 2005 which is almost two-fold increase over 2000. This increase is mainly due to exploding expansion of geothermal heat pump utilization: USA and western European countries lead these trends. Although geothermal heat pump distribution in Korea is still in its starting phase, comparing to Swiss achievement in terms of areal utilization sense, we expect to come up with national supply of over 600,000 toe in near future.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.665-666
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• 2008

Inserted HTS (high temperature superconducting) coil is promisingly expected as a solution for achievement of higher fields such as GHz scale NMR magnet. However, HTS magnet causes persistent current decay in the persistent current mode and this decay should be compensated in order to keep stable magnetic field. As a solution for the decay in the HTS magnets, we proposed a new type superconducting power supply, i.e., linear type magnetic flux pump (LTMFP). The LTMFP mainly consists of DC bias coil, 3-phase AC coil and superconducting Nb foil. The compensating current in closed superconductive circuit can be easily controlled by the intensity of 3-phase AC current and its frequency. In this study, it has been investigated that the flux pump can effectively charge the current for various frequencies according to the different load magnets.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.13 no.8
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• pp.746-756
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• 2001

An experimental study was conducted to investigated the effect of refrigerant flow control on the performance of a variable-speed heat pump operating in both cooling and heating mode. For this purpose, cooling and heating capacity, EER and refrigerant mass flow rate corresponding to an electronic valve as well as a capillary tube were measured as functions of compressor speed, length of capillary tube (or valve opening of the electronic valve), refrigerant charge, and outdoor temperature. From the comparison of experimental results, it was found that the performance variation due to the electronic valve opening became significant as the operating conditions(outdoor temperature and compressor speed) deviated from the standard condition at which heating capacity and EER were rated for the indicated capillary tube.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.85-88
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• 2000

This paper describes a Band-Selective Charge-Pump PLL(CPPLL) for clock recovery and clock generator. The proposed PLL satisfies fast acquisition time and low jitter characteristics simultaneously by reducing initial frequency error. The acquisition time of the designed Band-Selective CPPLL can be decreased down to 55% of a conventional CPPLL.

• ETRI Journal
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• v.30 no.3
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• pp.347-354
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• 2008

In this paper, the design of a low-power 512-bit synchronous EEPROM for a passive UHF RFID tag chip is presented. We apply low-power schemes, such as dual power supply voltage (VDD=1.5 V and VDDP=2.5 V), clocked inverter sensing, voltage-up converter, I/O interface, and Dickson charge pump using Schottky diode. An EEPROM is fabricated with the 0.25 ${\mu}m$ EEPROM process. Power dissipation is 32.78 ${\mu}W$ in the read cycle and 78.05 ${\mu}W$ in the write cycle. The layout size is 449.3 ${\mu}m$ ${\times}$ 480.67 ${\mu}m$.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.267-269
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• 2007

PLL(Phase Locked Loop) are widely used circuit technique in modern electronic systems. In this paper, We propose the low voltage and high speed PLL. We design the PFD(Phase Frequency Detector) by using TSPC (True Single Phase Clock) circuit to improve the performance and solve the dead-zone problem. We use CP(Charge Pump} and LP(Loop filter) for Negative feedback and current reusing in order to solve current mismatch and switch mismatch problem. The VCO(Voltage controlled Oscillator) with 5-stage differential ring oscillator is used to exact output frequency. The divider is implemented by using D-type flip flops asynchronous dividing. The frequency divider has a constant division ratio 32. The frequency range of VCO has from 200MHz to 1.1GHz and have 1.7GHz/v of voltage gain. The proposed PLL is designed by using 0.18um CMOS processor with 1.8V supply voltage. Oscillator's input frequency is 25MHz, VCO output frequency is 800MHz and lock time is 5us. It is evaluated by using cadence spectra RF tools.