• JSTS:Journal of Semiconductor Technology and Science
• /
• 제17권2호
• /
• pp.167-173
• /
• 2017

In this paper, the characterization of the vertical position of trapped charges in the charge-trap flash (CTF) memory is performed in the novel CTF memory cell with gate-all-around structure using technology computer-aided design (TCAD) simulation. In the CTF memories, injected charges are not stored in the conductive poly-crystalline silicon layer in the trapping layer such as silicon nitride. Thus, a reliable technique for exactly locating the trapped charges is required for making up an accurate macro-models for CTF memory cells. When a programming operation is performed initially, the injected charges are trapped near the interface between tunneling oxide and trapping nitride layers. However, as the program voltage gets higher and a larger threshold voltage shift is resulted, additional charges are trapped near the blocking oxide interface. Intrinsic properties of nitride including trap density and effective capture cross-sectional area substantially affect the position of charge centroid. By exactly locating the charge centroid from the charge distribution in programmed cells under various operation conditions, the relation between charge centroid and program operation condition is closely investigated.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제10권2호
• /
• pp.100-106
• /
• 2010

The impact of surface quantization on device parameters of a Si metal oxide semiconductor (MOS) capacitor has been analyzed in the present work. Variation of conduction band bending, position of discrete energy states, variation of surface potential, and the variation of inversion carrier concentration at charge centroid have been analyzed for different gate voltages, substrate doping concentrations and oxide thicknesses. Oxide thickness calculated from the experimental C-V data of a MOS capacitor is different from the actual oxide thickness, since such data include the effect of surface quantization. A correction factor has been developed considering the effect of charge centroid in presence of surface quantization at strong inversion and it has been observed that the correction due to surface quantization is crucial for highly doped substrate with thinner gate oxide.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
• /
• pp.124-125
• /
• 2008

The charge trapping and tunnelling characteristics with various thickness of $Si_3N_4$ layer were investigated for application of TBE (Tunnel Barrier Engineered) non-volatile memory. We confirmed that the critical thickness of no charge trapping was existed with decreasing $Si_3N_4$ thickness. Also, the charge trap centroid x and charge trap density were extracted by using CCS (Constant Current Stress) method. Through the optimized thickness of $Si_3N_4$ layer, it can be improve the performance of non-volatile memory.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2009년도 하계학술대회 논문집
• /
• pp.133-133
• /
• 2009

It is desirable to choose a high-k material having a large band offset with the tunneling oxide and a deep trapping level for use as the charge trapping layer to achieve high PIE (Programming/erasing) speeds and good reliability, respectively. In this paper, charge trapping and tunneling characteristics of high-k hafnium oxide ($HfO_2$) layer with various thicknesses were investigated for applications of tunnel barrier engineered nonvolatile memory. A critical thickness of $HfO_2$ layer for suppressing the charge trapping and enhancing the tunneling sensitivity of tunnel barrier were developed. Also, the charge trap centroid and charge trap density were extracted by constant current stress (CCS) method. As a result, the optimization of $HfO_2$ thickness considerably improved the performances of non-volatile memory(NVM).

• Journal of Astronomy and Space Sciences
• /
• 제19권4호
• /
• pp.273-282
• /
• 2002

과학위성 1호의 주탑재체인 원자외선 분광기의 검출기 전자부에 대한 특성을 분석하였다. FIMS (Far-ultraviolet Imaging Spectrograph)는 교차 지연선 양극을 가진 MCP(micro-channel plate)를 사용하여 입사된 원자외선 광자의 위치를 검출한다. MCP에 입사하는 광자는 MCP을 통해 전자형태로 변환되고 증폭된다. 증폭된 전하운의 중심은 양분되어 연결된 지연선을 통해 양단으로 나가게 되고, 지연선의 양단에서 전하운의 도착시간 차이를 구하여 입사된 광자의 위치를 판독한다. FIMS의 경우 2개의 MCP 검출기를 갖고 있으며, 각각 25mm$\times$25mm의 유효 크기를 갖고있다. 또 신호처리계는 1채널의 신호처리 회로계를 통해 2개의 검출기에 대한 영상검출이 가능하도록 함으로써 신호처리계의 복잡성을 피하고 아울러 전력과 무게 비용을 줄였다. 이 시스템을 통해 높은 시간 및 공간 분해능(<$35{\times}75$ps FWHM)을 얻었으며, 6W 이하의 저전력 시스템을 구현하였다.