• 센서학회지
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• 제23권1호
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• pp.24-28
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• 2014

A lock-in amplifier was proposed for capacitive sensor applications. This amplifier was based on a general-purpose microcontroller and had only a charge amplifier as analog circuits. All the other functions of lock-in amplifier except for the charge amplifier were implemented with firmware and the internal resources of the microcontroller. A rectangular signal, generated by the microcontroller, was used in a sensor-driving signal instead of a conventional sinusoidal signal. This makes it possible that the phase comparison circuit in the lockin amplifier is made with analog-to-digital converter, a timer and an interrupt controller. Using the oversampling method and the rectangular driving signal, we can make it easy to implement the peak detection function with software and sample the peak-to-peak signal at charge amplifier output. A charge amplifier was proposed to cancel out the base capacitance existing in capacitive sensors structurally. The experimental results show that the lock-in amplifier operating in the supply voltage of 3.0 V cancels out the base capacitance and has good linearity.

• Journal of Radiation Protection and Research
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• 제35권2호
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• pp.81-84
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• 2010

A CSA(Charge Sensitive Amplifier) was designed and fabricated for application in a radiation detection system based on a semiconductor detector such as Si, SiC, CdZnTe and etc.. A fabricated hybrid.type CSA was evaluated by comparison with a commercially available CSA. A comparison was performed by using calculation of ENC (Equivalent Noise Charge) and by using energy resolutions of fabricated radiation detectors based on Si. In energy resolution comparison, a fabricated CSA showed almost the same performance compared with a commercial one. In this study, feasibility of a fabricated CSA was discussed.

• 반도체디스플레이기술학회지
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• 제16권4호
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• pp.63-67
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• 2017

In this study, We developed a simple and low cost capacitive pressure mapping sensor and microcontroller-base lock-in amplifier array. We developed capacitive type pressure mapping sensor by forming the electrode and adhesives on plastic films using only the printing process, and the finishing the process by bonding the two films. Lock-in amplifier array was based on a general purpose microcontroller and had only a charge amplifier as analog circuits. In this study, a $10{\times}10$ capacitive type pressure mapping sensor and lock-in amplifier array was fabricated and its characteristics were analyzed.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2013년도 춘계학술대회 논문집
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• pp.693-694
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• 2013

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권3호
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• pp.331-338
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• 2014

A charge-pump circuit using a current-bypass technique, which suppresses charge sharing and reduces the sub-threshold currents, helps to decrease phase-locked loop (PLL) jitter without resorting to a feedback amplifier. The PLL shows no stability issues and no power-up problems, which may occur when a feedback amplifier is used. The PLL is implemented in 0.11-${\mu}m$ CMOS technology to achieve 0.856-ps RMS and 8.75-ps peak-to-peak jitter, which is almost independent of ambient temperature while consuming 4 mW from a 1.2-V supply.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2004년도 춘계학술대회논문집
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• pp.1047-1051
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• 2004

Charge amplifier systems benefit from the very wide dynamic range of PE accelerometers by offering flexibility in adjusting the electrical output characteristics such as sensitivity and range. They are well suited for operation at high temperatures. Modern charge systems feature improved low noise operation, simplified digital controls, and dual mode operation for operation with charge or IEPE voltage mode sensors. high impedance circuitry is not well suited for operation in adverse field or factory environments. The resolution of a PE accelerometer may not be specified or known since noise is a system consideration determined by cable length and amplifier gain. IEPE accelerometrs operate from a constant current power source, provide a high-voltage, low-impedance, fixed mV/g output. They operate through long, ordinary, coaxial cable in adverse environments without degradation of signal quality. They have limited high temperature range. IEPE sensors are simple to operate. Both resolution and operating range are defined specifications. Cost perchannel is lower compared to PE systems since low-noise cable and charge amplifiers are not required.

• 한국추진공학회지
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• 제3권4호
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• pp.12-22
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• 1999

Class-B 증폭기를 사용하는 가진기 시스템의 운용으로 인하여 다른 전자 시스템에 전자파 장해가 나타날 수 있으며, 이런 경우에 사용자가 이 장해를 해결하기 위하여 필요한 대책을 마련하기를 요구하고 있다. 한 가진기 시스템에서는 공통모드 잡음전압의 효과를 줄이기 위하여 Class-D 증폭기에서 차동증폭기가 사용되었고, 다른 가진기 시스템에서는 접지루프를 막기 위하여 변압기가 삽입되었다. 이 방법들은 이전에 발생하였던 불필요한 진동의 감소를 보여주고 있다. 전하증폭기의 변압기가 접지루프를 방지하기 위하여 Class-AB 증폭기를 사용한 가진기 시스템에서 수 년간 사용되었으나, Class-D 증폭기를 사용하는 가진기 시스템에서 이것은 잡음에 민감하였다. 따라서 전하증폭기와 진동 제어분석 시스템 사이의 접지루프를 변압기를 사용하지 않고 해결하였다. 이 방법의 유용성이 실험결과를 통하여 확인되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권4호
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• pp.293-298
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• 2006

Thermopiezoelectric method, using poly silicon heater and a piezoelectric sensor, was proposed for writing and reading in a probe based data storage system. Resistively heated tip writes data bits while scanning over a polymer media and piezoelectric sensor reads data bits from the self-generated charges induced by the deflection of the cantilever. 34${\times}$34 array of thermopiezoelectric nitride cantilevers were fabricated by a single step wafer level transfer method. We analyzed the noise level of the charge amplifier and measured the noise signal. With the sensor and the charge amplifier 20mn of deflection could be detected at a frequency of 10KHz. Reading signal was obtained from the cantilever array and the sensitivity was calculated.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2009년도 춘계학술대회
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• pp.678-681
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• 2009

본 논문에서는 자체 바이어스가 되는 Folded Cascode CMOS OP Amp를 이용하여 싱글 픽셀 포톤 계수기 회로를 설계하였다. 전압 바이어스 회로가 필요 없으므로 싱글 픽셀의 레이아웃 면적을 줄이고 전류 소모를 줄일 수 있다. 매그나칩 반도체 $0.18{\mu}m$ CMOS 공정을 이용하여 설계된 CSA(Charge Sensitive Amplifier)의 신호 전압은 이론치인 151mV이 근접한 138mV로 simulation되었다. 그리고 싱글 픽셀의 레이아웃 크기는 $100{\mu}m{\times}100{\mu}m$이다.

• 한국전자파학회논문지
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• 제15권6호
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• pp.540-547
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• 2004

본 논문에서는 900 MHz대역에서 70 % 이상의 고효율을 갖는 전류 모드 D급 전력증폭기를 설계, 제작하였다. 푸시-풀 B급 전력증폭기의 구조를 기초로 하여 병렬 고조파 컨트롤 회로를 적용하여, 기존 D급 전력증폭기의 큰 손실 요인이었던 소자 내 커패시턴스의 충, 방전에 의한 전력 손실을 최소화하였다. 측정결과, 900 MHz 대역, 출력전력 3.2 W에서 73 % 전력 부가 효율, 그리고 출력전력 5 W에서 72 % 전력 부가 효율을 각각 얻었으며 DC 전력에 따라 출력의 크기가 선형적으로 변화하는 D급 전력증폭기의 특성을 확인하였다.