• Title/Summary/Keyword: Channel code

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Radix-4 Trellis Parallel Architecture and Trace Back Viterbi Decoder with Backward State Transition Control (Radix-4 트렐리스 병렬구조 및 역방향 상태천이의 제어에 의한 역추적 비터비 디코더)

  • 정차근
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.397-409
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    • 2003
  • This paper describes an implementation of radix-4 trellis parallel architecture and backward state transition control trace back Viterbi decoder, and presents the application results to high speed wireless LAN. The radix-4 parallelized architecture Vietrbi decoder can not only improve the throughput with simple structure, but also have small processing delay time and overhead circuit compared to M-step trellis architecture one. Based on these features, this paper addresses a novel Viterbi decoder which is composed of branch metric computation, architecture of ACS and trace back decoding by sequential control of backward state transition for the implementation of radix-4 trellis parallelized structure. With the proposed architecture, the decoding of variable code rate due to puncturing the base code can easily be implemented by the unified Viterbi decoder. Moreover, any additional circuit and/or peripheral control logic are not required in the proposed decoder architecture. The trace back decoding scheme with backward state transition control can carry out the sequential decoding according to ACS cycle clock without additional circuit for survivor memory control. In order to evaluate the usefulness, the proposed method is applied to channel CODEC of the IEEE 802.11a high speed wireless LAN, and HDL coding simulation results are presented.

Performance Analysis of Handoff Channel Assignment Scheme in CDMA Cellular System (CDMA 셀룰러시스템에서의 핸드오프 채널할당기법 성능분석)

  • Lee, Dong-Myung;Lee, Chul-Hee
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.36S no.6
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    • pp.17-29
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    • 1999
  • In this paper, the prioritized queueing handoff scheme in CDMA (Code Division Multiple Access) cellular system is proposed. Also, the analytical survey for the proposed scheme is carried out, and the performance of this scheme is compared with that of non prioritized scheme and FIFO (First In First Out) queue scheme by computer simulation. The handoff region is defined as the time between the handoff treshold and the receiver threshold, and it is used for the maximum queue waiting time in the proposed scheme. The handoff and the receiver thresholds are defined as rewpectively: 1) the time that the Pilot Strength Measurement Message in the neighbor in the neighbor cell is received to the BS (Base Station) under the T_ADD threshold; and 2) the time that the T_DROP timer is expired and the Pilot Strength Measurement Message in the current cell is received to the BS under the T_DROP threshold. The performance metrics for analyzing the proposed scheme are : 1) probability of forced termination; 2) probability of call blocking; 3) ratio of carried traffic to total offered load; 4) average queue size; 5) average handoff delay time in queue. The simulation results show that the proposed scheme maintains high performance for handoff requests at a small penalty in total system capacity.

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The Design of Optimal Filters in Vector-Quantized Subband Codecs (벡터양자화된 부대역 코덱에서 최적필터의 구현)

  • 지인호
    • The Journal of the Acoustical Society of Korea
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    • v.19 no.1
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    • pp.97-102
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    • 2000
  • Subband coding is to divide the signal frequency band into a set of uncorrelated frequency bands by filtering and then to encode each of these subbands using a bit allocation rationale matched to the signal energy in that subband. The actual coding of the subband signal can be done using waveform encoding techniques such as PCM, DPCM and vector quantizer(VQ) in order to obtain higher data compression. Most researchers have focused on the error in the quantizer, but not on the overall reconstruction error and its dependence on the filter bank. This paper provides a thorough analysis of subband codecs and further development of optimum filter bank design using vector quantizer. We compute the mean squared reconstruction error(MSE) which depends on N the number of entries in each code book, k the length of each code word, and on the filter bank coefficients. We form this MSE measure in terms of the equivalent quantization model and find the optimum FIR filter coefficients for each channel in the M-band structure for a given bit rate, given filter length, and given input signal correlation model. Specific design examples are worked out for 4-tap filter in 2-band paraunitary filter bank structure. These optimum paraunitary filter coefficients are obtained by using Monte Carlo simulation. We expect that the results of this work could be contributed to study on the optimum design of subband codecs using vector quantizer.

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Implementation of Turbo Decoder Based on Two-step SOVA with a Scaling Factor (비례축소인자를 가진 2단 SOVA를 이용한 터보 복호기의 설계)

  • Kim, Dae-Won;Choi, Jun-Rim
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.11
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    • pp.14-23
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    • 2002
  • Two implementation methods for SOVA (Soft Output Viterbi Algorithm)of Turbo decoder are applied and verfied. The first method is the combination of a trace back (TB) logic for the survivor state and a double trace back logic for the weight value in two-step SOVA. This architecure of two-setp SOVA decoder allows important savings in area and high-speed processing compared with that of one-step SOVA decoding using register exchange (RE) or trace-back (TB) method. Second method is adjusting the reliability value with a scaling factor between 0.25 and 0.33 in order to compensate for the distortion for a rate 1/3 and 8-state SOVA decoder with a 256-bit frame size. The proposed schemes contributed to higher SNR performance by 2dB at the BER 10E-4 than that of SOVA decoder without a scaling factor. In order to verify the suggested schemes, the SOVA decoder is testd using Xillinx XCV 1000E FPGA, which runs at 33.6MHz of the maximum speed with 845 latencies and it features 175K gates in the case of 256-bit frame size.

Feasibility Study on Integration of SSR Correction into Network RTK to Provide More Robust Service

  • Lim, Cheol-Soon;Park, Byungwoon;Kim, Dong-Uk;Kee, Chang-Don;Park, Kwan-Dong;Seo, Seungwoo;So, Hyoungmin;Park, Junpyo
    • Journal of Positioning, Navigation, and Timing
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    • v.7 no.4
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    • pp.295-305
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    • 2018
  • Network RTK is a highly practical technology that can provide high positioning accuracy at levels between cm~dm regardless of user location in the network by extending the available range of RTK using reference station network. In particular, unlike other carrier-based positioning techniques such as PPP, users are able to acquire high-accuracy positions within a short initialization time of a few or tens of seconds, which increases its value as a future navigation system. However, corrections must be continuously received to maintain a high level of positioning accuracy, and when a time delay of more than 30 seconds occurs, the accuracy may be reduced to the code-based positioning level of meters. In case of SSR, which is currently in the process of standardization for PPP service, the corrections by each error source are transmitted in different transmission intervals, and the rate of change of each correction is transmitted together to compensate the time delay. Using these features of SSR correction is expected to reduce the performance degradation even if users do not receive the network RTK corrections for more than 30 seconds. In this paper, the simulation data were generated from 5 domestic reference stations in Gunwi, Yeongdoek, Daegu, Gimcheon, and Yecheon, and the network RTK and SSR corrections were generated for the corresponding data and applied to the simulation data from Cheongsong reference station, assumed as the user. As a result of the experiment assuming 30 seconds of missing data, the positioning performance compensating for time delay by SSR was analyzed to be horizontal RMS (about 5 cm) and vertical RMS (about 8 cm), and the 95% error was 8.7 cm horizontal and 1cm vertical. This is a significant amount when compared to the horizontal and vertical RMS of 0.3 cm and 0.6 cm, respectively, for Network RTK without time delay for the same data, but is considerably smaller compared to the 0.5 ~ 1 m accuracy level of DGPS or SBAS. Therefore, maintaining Network RTK mode using SSR rather than switching to code-based DGPS or SBAS mode due to failure to receive the network RTK corrections for 30 seconds is considered to be favorable in terms of maintaining position accuracy and recovering performance by quickly resolving the integer ambiguity when the communication channel is recovered.

Research and Verification of Distance and Dead Thickness Changes of Coaxial HPGe Detectors using PENELEOPE Simulation (PENELEOPE 시뮬레이션을 이용한 동축 HPGe 검출기의 거리 및 외부 접촉 층 두께 변화 연구 및 검증)

  • Eun-Sung Jang;Byung-In Min
    • Journal of the Korean Society of Radiology
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    • v.17 no.2
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    • pp.175-184
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    • 2023
  • Based on the actual shape of the detector and the data provided by the manufacturer, the shape of the detector was implemented through Penelope simulation and applied to the appropriate four-layer thickness based on the efficiency obtained from the measurements. Efficiency calculations to determine the effect of the simulated number of Full Energy Peak Efficiency(FEPE) channels in the detector and the outside contact layer in the crystal on the Full Energy Peak Efficiency were performed for various four-layer thicknesses of 0.3, 0.5, 0.7, 1.0, 1.2, and 1.4 mm using the Penelope Code. When the thickness of the external contact layer was increased by 5 times, the Full Energy Peak Efficiency decreased by about 36% for 59.50 keV, and the Full Energy Peak Efficiency decreased by 10% for 1836. In addition, as it increased by 10 times, the Full Energy Peak Efficiency decreased by about 20% for 59.54 keV, and 7% for 1836.01 keV. The Penelope simulated Full Energy Peak Efficiency channel decreases exponentially with the increase in the four layers. In addition, it was confirmed that the total effect curve was well matched with a relative difference of less than 3.5% in the 0.3-1.4 mm dead layer thickness region. However, it was found that the inhomogeneous dead layer is still a parameter in the Monte Carlo model.

LOCA Analysis and Development of a Simple Computer Code for Refill-Phase Analysis (냉각재 상실사고 분석 및 재충진 단계해석용 전산코드 개발)

  • Ree, Hee-Do;Park, Goon-Cherl;Kim, Hyo-Jung;Kim, Jin-Soo
    • Nuclear Engineering and Technology
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    • v.18 no.3
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    • pp.200-208
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    • 1986
  • The loss of coolant accident based on a double-ended cold leg break is analyzed with the discharge coefficient (Ca) of 0.4. This analysis covers the whole transient period from the start of depressurization to the complete refilling of the core by using RELAP4/MOD6-EM and RELAP4/ MOD6-HOT CHANNEL for the system thermal-hydraulics and the fuel performance during the blowdown phase respectively, and RELAP4/MOD6-FLOOD and TOODEE2 during the reflood phase. A simple analytical method has been developed to account for the lower plenum filling by approximating steam-water countercurrent flows and superheated wall effects at the downcomer during the refill period. Based on the informations. at the time of EOB (end-of-bypass), the refill duration time and the initial reflooding temperature were estimated and compared with the results from the RELAP4/MOD6, resulting in a good agreement. In addition, some parametric studies on the EOB were performed. The form loss coefficient between upper head and upper downcomer was found to be sensitive to the occurrence of the spurious EOB. Appropriate form loss coefficients should be taken into account to avoid the flow oscillations at the downcomer. The analyses with the six and three volume core nodalizations, respectively, show much similar trends in the system thermal-hydraulic performance, but the former case is recommended to obtain good results.

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Adaptive Power Control Dynamic Range Algorithm in WCDMA Downlink Systems (WCDMA 하향 링크 시스템에서의 적응적 PCDR 알고리즘)

  • 정수성;박형원;임재성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.8A
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    • pp.918-927
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    • 2004
  • WCDMA system is 3rd generation wireless mobile system specified by 3GPP. In WCDMA downlink, two power control schemes are operated. One is inner loop power control operated in every slot. Another is outer loop power control based on one frame time. Base station (BS) can estimate proper transmission power by these two power control schemes. However, because each MS's transmission power makes a severe effect on BS's performance, BS cannot give excessive transmission power to the specific user. 3GPP defined Power Control Dynamic Range (PCDR) to guarantee proper BS's performance. In this paper, we propose Adaptive PCDR algorithm. By APCDR algorithm, Radio Network Controller (RNC) can estimate each MS's current state using received signal to interference ratio (SIR). APCDR algorithm changes MS's maximum code channel power based on frame. By proposed scheme, each MS can reduce wireless channel effect and endure outages in cell edge. Therefore, each MS can obtain better QoS. Simulation result indicate that APCDR algorithm show more attractive output than fixed PCDR algorithm.

Analysis and Design of High Efficiency Feedforward Amplifier Using Distributed Element Negative Group Delay Circuit (분산 소자 형태의 마이너스 군지연 회로를 이용한 고효율 피드포워드 증폭기의 분석 및 설계)

  • Choi, Heung-Jae;Kim, Young-Gyu;Shim, Sung-Un;Jeong, Yong-Chae;Kim, Chul-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.6
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    • pp.681-689
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    • 2010
  • We will demonstrate a novel topology for the feedforward amplifier. This amplifier does not use a delay element thus providing an efficiency enhancement and a size reduction by employing a distributed element negative group delay circuit. The insertion loss of the delay element in the conventional feedforward amplifier seriously degrades the efficiency. Usually, a high power co-axial cable or a delay line filter is utilized for a low loss, but the insertion loss, cost and size of the delay element still acts as a bottleneck. The proposed negative group delay circuit removes the necessity of the delay element required for a broadband signal suppression loop. With the fabricated 2-stage distributed element negative group delay circuit with -9 ns of total group delay, a 0.2 dB of insertion loss, and a 30 MHz of bandwidth for a wideband code division multiple access downlink band, the feedforward amplifier with the proposed topology experimentally achieved a 19.4 % power added efficiency and a -53.2 dBc adjacent channel leakage ratio with a 44 dBm average output power.

Performance Analysis of MC-DS/CDMA System with Phase Error and Hybrid SC/MRC-(2/3) Diversity (위상 에러와 하이브리드 SC/MRC-(2/3)기법을 고려한 MC-DS/CDMA 시스템의 성능 분석)

  • Kim Won-Sub;Park Jin-Soo
    • The KIPS Transactions:PartC
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    • v.11C no.6 s.95
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    • pp.835-842
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    • 2004
  • In this paper, we have analyzed the MC-DS/CDMA system with input signal synchronized completely through adjustment of the gain in the PLL loop, by using the hybrid SC/MRC-(2/3) technique, which is said to one of the optimal diversity techniques under the multi-path fading environment, assuming that phase error is defined to the phase difference between the received signal from the multi-path and the reference signal in the PLL of the receiver. Also, assuming that the regarded radio channel model for the mobile communication is subject to the Nakagami-m fading channel, we have developed the expressions and performed the simulation under the consideration of various factor, in the MC/DS-CDMA system with the hybrid SC.MRC-(2/3) diversity method, such as the Nakagami fading index(m), $the\;number\;of\;paths\;(L_p),$ the number of hybrid SC.MRC-(2/3) $diversity\;branches\;(L,\;L_c),$ the number of users (K), the number of subcarriers (U), and the gain in the PLL loop. As a result of the simulation, it has been confirmed that the performance improvement of the system can be achieved by adjusting properly the PLL loop in order for the MC/DS-CDMA system with the hybrid SC/MRC-(2/3) diversity method to receive a fully synchronized signal. And the value of the gain in the PLL loop should exceed 7dB in order for the system to receive the signal with prefect synchronization, even though there might be a slight difference according to the values of the fading index and the spread processing gain of the subcarrier.