• Title/Summary/Keyword: Channel Inductor

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Computational Analysis of Fluid Flow and Temperature Distribution in a Galvanizing Bath Heated by Channel Inductors (Inductor 에 의해 가열된 용융 아연 도금욕 내의 유동과 온도 분포 계산)

  • Han, Kyung-A;Park, Hwa-Soo;Nam, Sung-Hyun
    • Proceedings of the KSME Conference
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    • 2007.05b
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    • pp.2654-2659
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    • 2007
  • Fluid flow and temperature distribution inside a molten zinc bath were investigated by computational fluid dynamics method. Modeling the channel inductor where alternating current of 60Hz was applied, Lorentz force and generated heat were obtained and later supplemented as source terms to momentum and heat equations. The present work validates CFD technique is effectively adopted when the inductor hardware modification or its configuration is considered for the optimum flows.

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A 4-channel 3.125-Gb/s/ch VCSEL driver Array (4-채널 3.125-Gb/s/ch VCSEL 드라이버 어레이)

  • Hong, Chaerin;Park, Sung Min
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.1
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    • pp.33-38
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    • 2017
  • In this paper, a 4-channel common-cathode VCSEL diode driver array with 3.125 Gb/s per channel operation speed is realized. In order to achieve faster speed of the switching main driver with relatively large transistors, the transmitter array chip consists of a pre-amplifier with active inductor stage and also an input buffer with modified equalizer, which leads to bandwidth extension and reduced current consumption. The utilized VCSEL diode provides inherently 2.2 V forward bias voltage, $50{\Omega}$ resistance, and 850 fF capacitance. In addition, the main driver based upon current steering technique is designed, so that two individual current sources can provide bias currents of 3.0 mA and modulation currents of 3.3 mA to VCSEL diodes. The proposed 4-channel VCSEL driver array has been implemented by using a $0.11-{\mu}m$ CMOS technology, and the chip core occupies the area of $0.15{\times}0.18{\mu}m^2$ and dissipates 22.3 mW per channel.

Signaling Scheme for Inductive Coupling Link (인덕티브 커플링 송수신 회로를 위한 신호 전달 기법)

  • Lee, Jang-Woo;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.7
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    • pp.17-22
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    • 2011
  • To propose effective signaling scheme for inductive coupling link, inductive coupling channel and signaling schemes are analyzed. For fair comparison of various signaling schemes, a signal quality factor ($Q_{signal}$) is introduced and the NRZ signal scheme shows better signal quality factor than BPM signaling schemes. For simulation, the transmitter for inductive coupling link is designed with 0.13 ${\mu}m$ CMOS process and the inductor is modeled as spiral inductor in chip.

A 6 Gb/s Low Power Transimpedance Amplifier with Inductor Peaking and Gain Control for 4-channel Passive Optical Network in 0.13 μm CMOS

  • Lee, Juri;Park, Hyung Gu;Kim, In Seong;Pu, YoungGun;Hwang, Keum Cheol;Yang, Youngoo;Lee, Kang-Yoon;Seo, Munkyo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.1
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    • pp.122-130
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    • 2015
  • This paper presents a 6 Gb/s 4-channel arrayed transimpedance amplifiers (TIA) with the gain control for 4-channel passive optical network in $0.13{\mu}m$ complementary metal oxide semiconductor (CMOS) technology. A regulated cascode input stage and inductive-series peaking are proposed in order to increase the bandwidth. Also, a variable gain control is implemented to provide flexibility to the overall system. The TIA has a maximum $98.1dB{\Omega}$ gain and an input current noise level of about 37.8 pA/Hz. The die area of the fabricated TIA is $1.9mm{\times}2.2mm$ for 4-channel. The power dissipation is 47.64 mW/1ch.

DC/DC Boost Converter using Coupling Inductor For High Power Fuel Cell Systems (고전력 연료전지 시스템을 위한 커플링 인덕터를 사용한 DC/DC 부스트 컨버터)

  • Kim Y. H.;Kim J. M.;Moon H. W.;Jung E. J.;Won C. Y.
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.489-493
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    • 2004
  • 연료전지는 차세대 대체 에너지원으로 부각되고 있다. 그러나 연료전지시스템 특성상 전류의 정격이 큼으로 전류의 리플성분을 감소시킬 필요가 있다. 본 논문에서는 부스트 컨버터 회로에서 인덕터에 흐르는 전류의 리플성분을 줄이기 위한 방법으로 3-channel 감${\cdot}$가극성 커플링 인덕터를 사용한 부스트 컨버터를 제안하였고 이를 일반적인 인덕터, 2-channel 감${\cdot}$가극성 커플링 인덕터를 사용한 컨버터 시스템과 비교 분석하고 시뮬레이션을 통해 시스템의 적합성을 검증하였다. 커플링 인덕터를 사용함으로써 전류 리플 성분이 감소될 뿐 아니라 시스템 효율, 무게, 가격 면에서의 효과도 기대 된다.

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Novel Single-inductor Multistring-independent Dimming LED Driver with Switched-capacitor Control Technique

  • Liang, Guozhuang;Tian, Hanlei
    • Journal of Power Electronics
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    • v.19 no.1
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    • pp.1-10
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    • 2019
  • Current imbalance is the main factor affecting the lifespan of light-emitting diode (LED) lighting systems and is generally solved by active or passive approaches. Given many new lighting applications, independent control is particularly important in achieving different levels of luminance. Existing passive and active approaches have their own limitations in current sharing and independent control, which bring new challenges to the design of LED drivers. In this work, a multichannel resonant converter based on switched-capacitor control (SCC) is proposed for solving this challenge. In the resonant network of the upper and lower half-bridges, SCC is used instead of fixed capacitance. Then, the individual current of the LED array is obtained through regulation of the effective capacitance of the SCC under a fixed switching frequency. In this manner, the complexity of the control unit of the circuit and the precision of the multichannel outputs are further improved. Finally, the superior performance of the proposed LED driver is verified by simulations and a 4-channel experimental prototype with a rated output power of 20 W.

Multichannel Transimpedance Amplifier Away in a $0.35\mu m$ CMOS Technology for Optical Communication Applications (광통신용 다채널 CMOS 차동 전치증폭기 어레이)

  • Heo Tae-Kwan;Cho Sang-Bock;Park Min Park
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.8 s.338
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    • pp.53-60
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    • 2005
  • Recently, sub-micron CMOS technologies have taken the place of III-V materials in a number of areas in integrated circuit designs, in particular even for the applications of gjgabit optical communication applications due to its low cost, high integration level, low power dissipation, and short turn-around time characteristics. In this paper, a four-channel transimpedance amplifier (TIA) array is realized in a standard 0.35mm CMOS technology Each channel includes an optical PIN photodiode and a TIA incorporating the fully differential regulated cascode (RGC) input configuration to achieve effectively enhanced transconductance(gm) and also exploiting the inductive peaking technique to extend the bandwidth. Post-layout simulations show that each TIA demonstrates the mid-band transimpedance gain of 59.3dBW, the -3dB bandwidth of 2.45GHz for 0.5pF photodiode capacitance, and the average noise current spectral density of 18.4pA/sqrt(Hz). The TIA array dissipates 92mw p in total from a single 3.3V supply The four-channel RGC TIA array is suitable for low-power, high-speed optical interconnect applications.

Integrated Current-Mode DC-DC Buck Converter with Low-Power Control Circuit

  • Jeong, Hye-Im;Lee, Chan-Soo;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.5
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    • pp.235-241
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    • 2013
  • A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

Derivation of Parameters for Loudspeaker with Frequency Dependent Terms and Discussion for Estimation Methods (라우드스피커 주파수 종속 매개변수 유도 및 규명법 비교)

  • Park, Seok-Tae
    • The Journal of the Acoustical Society of Korea
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    • v.26 no.6
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    • pp.276-285
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    • 2007
  • In this paper it was discussed and compared measured loudspeaker impedance curve with ones reconstructed by TS parameters estimated using four kinds of parameter estimation methods developed in frequency domain. Frequency dependent parameters were introduced and derived using least square error minimization technique. For known dynamic mass TS parameter estimation methods were reviewed and also proved non-uniqueness of these parameters by simulation method. Minimum phase transformation was adopted to derive phase information from magnitude of loudspeaker electrical impedance curve measured by one channel analyzer.

A Design and Implementation of 4×10 Gb/s Transimpedance Amplifiers (TIA) Array for TWDM-PON (TWDM-PON 응용을 위한 4×10 Gb/s Transimpedance Amplifier 어레이 설계 및 구현)

  • Yang, Choong-Reol;Lee, Kang-Yoon;Lee, Sang-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39B no.7
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    • pp.440-448
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    • 2014
  • A $4{\times}10$ Gb/s Transimpedance Amplifier (TIA) array is implemented in $0.13{\mu}m$ CMOS process technology, which will be used in the receiver of TWDM-PON system. A technology for bandwidth enhancement of a given $4{\times}10$ Gb/s TIA presented under inductor peaking technology and a single 1.2V power supply based low voltage design technology. It achieves 3 dB bandwidth of 7 GHz in the presence of a 0.5 pF photodiode capacitance. The trans-resistance gain is $50dB{\Omega}$, while 48 mW/ 1channel from a 1.2 V supply. The input sensitivity of the TIA is -27 dBm. The chip size is $1.9mm{\times}2.2mm$.