• Transactions on Electrical and Electronic Materials
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• 제9권4호
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• pp.156-162
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• 2008

We report results on a study of inductively coupled plasma (ICP) etching of Parylene-C (poly-monochloro-para-xylylene) films using an $O_2$ gas. Effects of process parameters on etch rates were investigated and are discussed in this article from the standpoint of plasma parameter measurements, performed using a Langmuir probe and modeling calculation. Process parameters of interest include ICP source power and pressure. It was shown that major etching agent of polymer films was oxygen atoms O($^3P$). At the same time it was proposed that positive ions were not effective etchant, but ions played an important role as effective channel of energy transfer from plasma towards the polymer.

• ETRI Journal
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• 제27권1호
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• pp.89-94
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• 2005

This paper describes a low-loss, compact, 40-channel arrayed waveguide grating (AWG) which utilizes a monolithically integrated spot-size converter (SSC) for lowering the coupling loss between silica waveguides and standard single-mode fibers. The SSC is a simple waveguide structure that is tapered in both the vertical and horizontal directions. The vertically tapered structure was realized using a shadow-mask etching technique. By employing this technique, the fabricated, 40-channel, 100 GHz-spaced AWG with silica waveguides of 1.5% relative index-contrast showed an insertion-loss figure of 2.8 dB without degrading other optical performance.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2005년도 금형가공,미세가공,플라스틱가공 공동 심포지엄
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• pp.49-53
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• 2005

The objective of this research was to establish the size limitation of micro metal forming and analyze the formability of foil. Flat-rolled ultra thin metallic copper foil($3{\mu}m$ in thickness) was used as a forming material and foil was annealed to improve the formability at the temperature of $385^{\circ}C$. Forming die was fabricated by using etching technique of DRIE(deep reactive ion etching) and HNA isotropic etching. For the forming die and coupe. foil were vacuum packed and the forming was conducted as applying hydrostatic pressure of 250MPa to the vacuum packed unit. We successfully obtained the micro channels of $12\~14{\mu}m$ width and $9{\mu}m$ depth from micro forming process we designed. We also investigated the thickness strain distribution of foil from experiment and FE simulation result. Micro channels had a good formability of smooth surface and size accuracy. We expect that micro metal forming technology will be applied to production of micro parts.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.921-926
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• 2001

The link for the Superconducting Flux Flow Transistor (SFFT) which is based on the flux flow has been fabricated by the ICP etching methods. The channel width and the thickness of the SFFT were a 3 ${\mu}$m and about 300 nm, respectively. The superconducting characteristic of the link was measured by the x-ray diffraction and the E.D.S.. The SFFT etched by ICP showed an I-V characteristic like the three terminal transistor.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.561-564
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• 2003

본 연구는 고온 초전도 자속 흐름 트랜지스터의 채널 식각 두께에 따른 임계 특성의 자동 측정을 위해 나노옴/마이크로 볼트 미터 와 전원공급기 등 측정에 필요한 장비들을 GPIB 인터페이스 보드를 통해 PC와 연결하여 측정 장치를 구축후 직접 제작한 측정 프로그램을 통해 자동으로 시편에 전류, 전압을 가한후 임계 특성값을 효율적인 방법으로 측정하고 측정 결과값들을 시간순서 및 측정 대상에 따라 데이터 베이스화 하는 방법에 대하여 소개한다. 부수적으로 임계 특성의 정확한 측정을 위해 실험에 변수가 되는 요소들을 찾아내고 실험 데이터값들로부터 오차를 발견, 오차의 원인이 되는 식각 방법 및 실험 환경등의 부가적인 요소들을 고려하여 개선된 측정 장치를 구축하는데 경제적, 시간적인 효율성 측면에 대해 언급했다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 제4회 영호남학술대회 논문집
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• pp.138-141
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• 2002

The channel of the superconducting Flux Flow Transistor has been fabricated with plasma etching method using ICP. The ICP conditions were 700 W of ICP power, 150 W of rf chuck power, 5 mTorr of the pressure in chamber and 1:1 of Ar : $Cl_2$, respectively. The channel etched by plasma gas showed superconducting characteristics of over 77 K and superior surface morphology. The critical current of SFFT was altered by varying the external applied current. As the external applied current increased from 0 to 12 mA, the critical current decreased from 28 to 22 mA. Then the obtained $r_m$ values were smaller than $0.1\Omega$ at a bias current of 40 mA. The current gain was about 0.5. Output resistance was below $0.2\Omega$.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2003년도 춘계학술대회 논문집
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• pp.1873-1876
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• 2003

Magneto-rheological polishing is a new technology used in precision polishing. It utilizes magneto-rheological fluid. nonmagnetic polishing abrasive, aqueous carrier fluids in magnetic field to remove material from a part surface. Silicon micro channel as work piece is fixed in the slurry which is made of MR fluid and CeO$_2$(10 vol%) abrasive particles. And permanent magnet rotate in the slurry to transfers magnetic force to abrasive particles by increasing yield strength of MR fluid. so, the obtained bottom surface roughness of micro channel by experiment reduced to Ra 0.010 $\mu\textrm{m}$ Rmax 0.103 $\mu\textrm{m}$ and finwall surface roughness of micro channel reduced to Ra 0.018 $\mu\textrm{m}$ Rmax 0.468 $\mu\textrm{m}$. At optimum conditions of variables, the workpiece as silicon micro channel have about 24 times smaller surface roughness than before polishing.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.1111-1113
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• 2004

n+ etching process is investigated in the fabrication of TFF-LCD using low resistance data line of Mo/Al/Mo. Problems of consumption of upper Mo layer and contamination of channel area are resolved. Either of HCl or $Cl_2$ can be selected as a main etchant gas, and either of $SF_6$ or $CF_4$ can be selected as an additive. Plasma treatment after n+ etching process can reduce the off-current high problem.

• 전자공학회논문지A
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• 제29A권2호
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• pp.77-79
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• 1992

We propose a self-aligned and double recessed technique for GaAs power MESFETs application. The gate length and the wide recess width are defined by a selective removal of the SiN layer using reactive ion etching(RIE) while the depth of the channel is defined by chemical etching of GaAs layers. The threshold voltages and the saturation drain voltage could be sucessfully controlled using this technique. The lateral-etched distance increases with the dry etching time and the source-drain breakdown voltage of MESFET increases up to about 30V at a pinch-off condition. The electrical characteristics of a MESFET with a gate length of 2 x10S0-6Tm and a source-gate spacing of 33 x10S0-6Tm show maximum transconductance of 120 mS/mm and saturation drain current density of 170-190mA/mm at a gate voltage of 0.8V.

• 대한설비공학회:학술대회논문집
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• 대한설비공학회 2008년도 동계학술발표대회 논문집
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• pp.215-220
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• 2008

A microchannel PCHE is manufactured by the two technologies of micro photo-etching and diffusion bonding. In this paper, heat transfer and pressure drop characteristics by applying various configuration for the flow channel in the microchannel PCHE is experimentally investigated. The flow channel configurations are designed three types such as straight, wavy and offset strip channels. The performance experiment of each configuration is performed for Reynolds numbers in ranges of $100{\sim}700$ under various flow conditions for the hot side and the Reynolds number of cold side is fixed at 350. The inlet temperatures of the hot side and cold side are conducted as $40^{\circ}C$ and $20^{\circ}C$, respectively. The heat transfer performance of wavy channel, which was similar to that of offset strip channel, was much higher than that of straight channel. The effectiveness of wavy channel and offset strip channel was evaluated as about $0.5{\sim}0.9$. The pressure drop of wavy channel was highest among configurations and that of offset strip channel was lower than that of straight channel because the round curved surface of each strip edge was reduced the pressure loss.