• 한국ITS학회 논문지
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• 제8권3호
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• pp.83-90
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• 2009

본 논문은 Ku-Band 선형화 채널증폭기를 위한 비행 모델의 설계 및 측정에 관한 것이다. 모든 MMICs, 가변이득증폭기, 가변전압감쇄기, 전치왜곡 보상회로를 위한 브랜치 라인 결합기와 검출기는 Thin-Film Hybrid 작업으로 제작되었다. 제작된 모듈의 성능은 초고주파 회로분석 시뮬레이션 틀과 우주환경에서의 전기적인 성능 시험을 통하여 검증하였다.

• 전기학회논문지
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• 제65권3호
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• pp.452-456
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• 2016

In this paper, a dual-channel readout amplifier array is realized in a standard $0.18{\mu}m$ CMOS technology for the applications of panoramic scan LADAR systems. Each channel consists of a PIN photodiode with 0.9 A/W responsivity and a 1.0 Gb/s readout amplifier(ROA). The proposed ROA shares the basic configuration of the previously reported feedforward TIA, except that it exploits a replica input to exclude a low pass filter(LPF), thus reducing chip area and improving integration level, and to efficiently reject common-mode noises. Measured results demonstrate that each channel achieves $70dB{\Omega}$ transimpedance gain, 829 MHz bandwidth, -22 dBm sensitivity for $10^{-9}BER$, -34 dB crosstalk between adjacent channels, and 45 mW power dissipation from a single 1.8 V supply.

• 한국정보통신학회논문지
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• 제26권11호
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• pp.1666-1671
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• 2022

채널 간격이 50 GHz 인 64 채널 파장분할 다중화 광신호를 위한 고출력 이득 평탄화된 L-band 광증폭기의 구조가 최적화되고 이 증폭기의 출력 특성이 측정되었다. 1570 nm 에서 1600 nm 사이에서 그리고 -2 dBm 입력조건 하에서, 최적화된 이단증폭기는 1 dB 오차 내에서 파장에 따른 평탄화된 이득을 가지며 이득 값은 20 dB 였다. 잡음지수는 6 dB 이내로 최소화 되었다. 추가적인 소자의 도움 없이 EDF 의 특성만을 고려하여 이득평탄화가 구현되었다. 증폭기는 2단 증폭단으로 구성되며 각 증폭단은 EDFA 구조를 기본으로 하였다. 각 단에서 EDF의 길이와 펌핑 구조들이 실험을 통해 최적화 되었다.

• Journal of Electrical Engineering and Technology
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• 제3권4호
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• pp.566-570
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• 2008

Vertical nanowire SGFETs(Surrounding Gate Field Effect Transistors) provide full gate control over the channel to eliminate short channel effects. This paper presents design and characterization of a differential pair amplifier using NMOS and PMOS SGFETs with a 10nm channel length and a 2nm channel radius. The amplifier dissipates $5{\mu}W$ power and provides 5THz bandwidth with a voltage gain of 16, a linear output voltage swing of 0.5V, and a distortion better than 3% from a 1.8V power supply and a 20aF capacitive load. The 2nd and 3rd order harmonic distortions of the amplifier are -40dBm and -52dBm, respectively, and the 3rd order intermodulation is -24dBm for a two-tone input signal with 10mV amplitude and 10GHz frequency spacing. All these parameters indicate that vertical nanowire surrounding gate transistors are promising candidates for the next generation high speed analog and VLSI technologies.

• 한국음향학회지
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• 제26권5호
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• pp.188-193
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• 2007

일반적으로 현재 사용하고 있는 홈시어터를 구성하기 위해서는 5.1 채널 이상의 아날로그 앰프를 주로 사용한다. 그러나 고성능의 시스템을 구성하기 위해서는 스피커의 출력이나 효율을 고려하여 음향 신호 처리를 디지털로 하는 것이 유리하다. 특히 음향을 효과적으로 분리하기 위해서는 7.1채널의 사용이 필요하다. 본 논문에서는 홈시어터 스피커를 위한 S/PDIF 7.1 채널 디지털 앰프의 구조를 연구하고 설계하였다. S/PDIF 7.1 채널 디지털 앰프는 노이즈에 강하고 S/PDIF를 사용하여 디지털 데이터를 직접 입력받아서 처리하기 때문에 디지털 원음의 손실이 적은 우수한 성능을 보여주고 있다.

• ETRI Journal
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• 제42권5호
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• pp.773-780
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• 2020

A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

• 한국컴퓨터산업학회논문지
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• 제8권2호
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• pp.123-130
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• 2007

본 논문에서는 신호조정 회로로서 필수적인 다중 채널 심장 전기도 전치 증폭기를 제작하기 위한 설계조건의 분석 및 전기 회로적 해석을 수행하였다. 설계된 회로는 기존의 64 채널의 공간 분해능을 향상시키기 위하여 128채널로 구성하였으며, 전치증폭기는 입력회로부, 차동증폭부, 오른다리구동회로 및 주증폭기의 노치필터로 구성되도록 설계하였다.

• Journal of the Optical Society of Korea
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• 제18권5호
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• pp.442-448
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• 2014

For the first time, a novel analytical model of the net gain for a Raman-EDFA hybrid optical amplifier (HOA) is proposed and its various parameters optimized using a genetic algorithm. Our method has been shown to be robust in the simultaneous analysis of multiple parameters (Raman length, EDFA length, and pump powers) to obtain large gain. The optimized HOA is further investigated at the system level for the scenario of a 50-channel DWDM system with 0.2-nm channel spacing. With an optimized HOA, a flat gain of >17 dB is obtained over the effective ITU-T wavelength grid with a variation of less than 1.5 dB, without using any gain-flattening technique. The obtained noise figure is also the lowest value ever reported for a Raman-EDFA HOA at reduced channel spacing.

• 전기학회논문지P
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• 제52권1호
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• pp.28-34
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• 2003

In this paper, a predistortion linearizer using series diode is proposed for linearizing the power amplifier in microwave radio systems. The power amplifier should be operated near saturation region to achieve high efficiency. But at this region, amplitude and phase distortions of the amplifier remarkably increase with the increase of input power and cause a significant adjacent channel interference. The linearizer is composed of a series diode with a parallel capacitor, which provides positive amplitude and negative phase deviations with the increasing input power. This type of linearizer using the nonlinearity of diode has improved the C/I(Carrier to Intermodulation Distortion) ratio well. By applying this linearizer to two-tone 880MHz power amplifier, adjacent channel leakage power is improved up to 5dBm.

• Journal of Advanced Marine Engineering and Technology
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• 제31권5호
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• pp.575-582
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• 2007

In this paper, a 100 Watt high power amplifier has been implemented and performed evaluation, which is operating at UHF band ($470\;{\sim}\;806\;MHz$) for Digital TV repeater. To achieve increase of bandwidth and high power capability, 3-way power combiner and divider of Wilkinson type was adopted. In order to measure the fabricated 100 Watt power amplifier, the estimation technique function which makes equivalent mask was used. As a result of the measurement, the existence of pilot signal is confirmed and the signal transmitted at the rated output power 100 Watt is brought out the flat feature through 6 MHz bandwidth. and it resulted that its value was less than -47 dB at the edge of radiation channel and less than -110 dB at more than 6 MHz position from channel edge.