• Title/Summary/Keyword: Census Transform algorithm

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A Novel Red Apple Detection Algorithm Based on AdaBoost Learning

  • Kim, Donggi;Choi, Hongchul;Choi, Jaehoon;Yoo, Seong Joon;Han, Dongil
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.4
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    • pp.265-271
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    • 2015
  • This study proposes an algorithm for recognizing apple trees in images and detecting apples to measure the number of apples on the trees. The proposed algorithm explores whether there are apple trees or not based on the number of image block-unit edges, and then it detects apple areas. In order to extract colors appropriate for apple areas, the CIE $L^*a^*b^*$ color space is used. In order to extract apple characteristics strong against illumination changes, modified census transform (MCT) is used. Then, using the AdaBoost learning algorithm, characteristics data on the apples are learned and generated. With the generated data, the detection of apple areas is made. The proposed algorithm has a higher detection rate than existing pixel-based image processing algorithms and minimizes false detection.

A Study on an Open/Closed Eye Detection Algorithm for Drowsy Driver Detection (운전자 졸음 검출을 위한 눈 개폐 검출 알고리즘 연구)

  • Kim, TaeHyeong;Lim, Woong;Sim, Donggyu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.7
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    • pp.67-77
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    • 2016
  • In this paper, we propose an algorithm for open/closed eye detection based on modified Hausdorff distance. The proposed algorithm consists of two parts, face detection and open/closed eye detection parts. To detect faces in an image, MCT (Modified Census Transform) is employed based on characteristics of the local structure which uses relative pixel values in the area with fixed size. Then, the coordinates of eyes are found and open/closed eyes are detected using MHD (Modified Hausdorff Distance) in the detected face region. Firstly, face detection process creates an MCT image in terms of various face images and extract criteria features by PCA(Principle Component Analysis) on offline. After extraction of criteria features, it detects a face region via the process which compares features newly extracted from the input face image and criteria features by using Euclidean distance. Afterward, the process finds out the coordinates of eyes and detects open/closed eye using template matching based on MHD in each eye region. In performance evaluation, the proposed algorithm achieved 94.04% accuracy in average for open/closed eye detection in terms of test video sequences of gray scale with 30FPS/$320{\times}180$ resolution.

Development of Rotation Invariant Real-Time Multiple Face-Detection Engine (회전변화에 무관한 실시간 다중 얼굴 검출 엔진 개발)

  • Han, Dong-Il;Choi, Jong-Ho;Yoo, Seong-Joon;Oh, Se-Chang;Cho, Jae-Il
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.48 no.4
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    • pp.116-128
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    • 2011
  • In this paper, we propose the structure of a high-performance face-detection engine that responds well to facial rotating changes using rotation transformation which minimize the required memory usage compared to the previous face-detection engine. The validity of the proposed structure has been verified through the implementation of FPGA. For high performance face detection, the MCT (Modified Census Transform) method, which is robust against lighting change, was used. The Adaboost learning algorithm was used for creating optimized learning data. And the rotation transformation method was added to maintain effectiveness against face rotating changes. The proposed hardware structure was composed of Color Space Converter, Noise Filter, Memory Controller Interface, Image Rotator, Image Scaler, MCT(Modified Census Transform), Candidate Detector / Confidence Mapper, Position Resizer, Data Grouper, Overlay Processor / Color Overlay Processor. The face detection engine was tested using a Virtex5 LX330 FPGA board, a QVGA grade CMOS camera, and an LCD Display. It was verified that the engine demonstrated excellent performance in diverse real life environments and in a face detection standard database. As a result, a high performance real time face detection engine that can conduct real time processing at speeds of at least 60 frames per second, which is effective against lighting changes and face rotating changes and can detect 32 faces in diverse sizes simultaneously, was developed.

Development of Reduction Algorithm for Face Detection Error Using MCT and Neural Network (MCT와 신경망을 이용한 얼굴 오검출 감소 알고리즘 개발)

  • Ra, Seung-Tak;Lee, Seung-Ho
    • Proceedings of the Korea Information Processing Society Conference
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    • 2016.04a
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    • pp.700-703
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    • 2016
  • OpenCV(Open Computer Vision)에서 제공하는 얼굴 검출 알고리즘은 Haar-like feature와 Cascade 방식을 이용하여 얼굴의 패턴을 찾아내 얼굴을 검출한다. 그러나 우연히 얼굴이 아닌 곳이 얼굴과 유사한 패턴일 경우, 얼굴로 인식하는 오류를 범하게 된다. 따라서 본 논문은 MCT(Modified Census Transform)와 신경망을 이용하여 잘못된 얼굴 검출 영역을 감소시키는 알고리즘을 제안한다. MCT는 다양한 조명 조건에서도 강인한 얼굴 영상의 지역적 구조 특징을 추출하기 위하여 사용되고, 신경망 알고리즘은 Haar-Cascade 알고리즘의 얼굴 검출 방법으로 검출된 영역이 실제로 얼굴인지 아닌지를 판단하기 위하여 사용된다. 실험에서 사용된 6개의 데이터들은 인터넷에서 수집한 것으로서, Haar-Cascade 알고리즘의 얼굴 검출 방법으로 얼굴을 검출하였을 때 오검출된 영역이 1개 이상 존재한다. 본 논문에서 제안한 알고리즘으로 실험한 결과, Haar-Cascade 알고리즘의 얼굴 검출 방법에 비하여 오검출된 영역이 감소된 것을 확인할 수 있었다.

An FPGA-based Parallel Hardware Architecture for Real-time Eye Detection

  • Kim, Dong-Kyun;Jung, Jun-Hee;Nguyen, Thuy Tuong;Kim, Dai-Jin;Kim, Mun-Sang;Kwon, Key-Ho;Jeon, Jae-Wook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.2
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    • pp.150-161
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    • 2012
  • Eye detection is widely used in applications, such as face recognition, driver behavior analysis, and human-computer interaction. However, it is difficult to achieve real-time performance with software-based eye detection in an embedded environment. In this paper, we propose a parallel hardware architecture for real-time eye detection. We use the AdaBoost algorithm with modified census transform(MCT) to detect eyes on a face image. We parallelize part of the algorithm to speed up processing. Several downscaled pyramid images of the eye candidate region are generated in parallel using the input face image. We can detect the left and the right eye simultaneously using these downscaled images. The sequential data processing bottleneck caused by repetitive operation is removed by employing a pipelined parallel architecture. The proposed architecture is designed using Verilog HDL and implemented on a Virtex-5 FPGA for prototyping and evaluation. The proposed system can detect eyes within 0.15 ms in a VGA image.

Hardware Implementation of Facial Feature Detection Algorithm (얼굴 특징 검출 알고리즘의 하드웨어 설계)

  • Kim, Jung-Ho;Jeong, Yong-Jin
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.1
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    • pp.1-10
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    • 2008
  • In this paper, we designed a facial feature(eyes, a moult and a nose) detection hardware based on the ICT transform which was developed for face detection earlier. Our design used a pipeline architecture for high throughput and it also tried to reduce memory size and memory access rate. The algerian and its hardware implementation were tested on the BioID database, which is a worldwide face detection test bed, and its facial feature detection rate was 100% both in software and hardware, assuming the face boundary was correctly detected. After synthesizing the hardware on Dongbu $0.18{\mu}m$ CMOS library, its die size was $376,821{\mu}m^2$ with the maximum operating clock 78MHz.

Real-Time Face Recognition System Based on Illumination-insensitive MCT and Frame Consistency (조명변화에 강인한 MCT와 프레임 연관성 기반 실시간 얼굴인식 시스템)

  • Cho, Gwang-Shin;Park, Su-Kyung;Sim, Dong-Gyu;Lee, Soo-Youn
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.3
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    • pp.123-134
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    • 2008
  • In this paper, we propose a real-tin e face recognition system that is robust under various lighting conditions. Th Modified Census Transform algorithm that is insensitive to illumination variations is employed to extract local structure features. In a practical face recognition system, acquired images through a camera are likely to be blurred and some of them could be side face images, resulting that unacceptable performance could be obtained. To improve stability of a practical face recognition system, we propose a real-time algorithm that rejects unnecessary facial picture and makes use of recognition consistency between successive frames. Experimental results on the Yale database with large illumination variations show that the proposed approach is approximately 20% better than conventional appearance-based approaches. We also found that the proposed real-time method is more stable than existing methods that produces recognition result for each frame.

Head Pose Estimation Based on Perspective Projection Using PTZ Camera (원근투영법 기반의 PTZ 카메라를 이용한 머리자세 추정)

  • Kim, Jin Suh;Lee, Gyung Ju;Kim, Gye Young
    • KIPS Transactions on Software and Data Engineering
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    • v.7 no.7
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    • pp.267-274
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    • 2018
  • This paper describes a head pose estimation method using PTZ(Pan-Tilt-Zoom) camera. When the external parameters of a camera is changed by rotation and translation, the estimated face pose for the same head also varies. In this paper, we propose a new method to estimate the head pose independently on varying the parameters of PTZ camera. The proposed method consists of 3 steps: face detection, feature extraction, and pose estimation. For each step, we respectively use MCT(Modified Census Transform) feature, the facial regression tree method, and the POSIT(Pose from Orthography and Scaling with ITeration) algorithm. The existing POSIT algorithm does not consider the rotation of a camera, but this paper improves the POSIT based on perspective projection in order to estimate the head pose robustly even when the external parameters of a camera are changed. Through experiments, we confirmed that RMSE(Root Mean Square Error) of the proposed method improve $0.6^{\circ}$ less then the conventional method.

Design and Verification of Pipelined Face Detection Hardware (파이프라인 구조의 얼굴 검출 하드웨어 설계 및 검증)

  • Kim, Shin-Ho;Jeong, Yong-Jin
    • Journal of Korea Multimedia Society
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    • v.15 no.10
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    • pp.1247-1256
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    • 2012
  • There are many filter based image processing algorithms and they usually require a huge amount of computations and memory accesses making it hard to attain a real-time performance, expecially in embedded applications. In this paper, we propose a pipelined hardware structure of the filter based face detection algorithm to show that the real time performance can be achieved by hardware design. In our design, the whole computation is divided into three pipeline stages: resizing the image (Resize), Transforming the image (ICT), and finding candidate area (Find Candidate). Each stage is optimized by considering the parallelism of the computation to reduce the number of cycles and utilizing the line memory to minimize the memory accesses. The resulting hardware uses 507 KB internal SRAM and occupies 9,039 LUTs when synthesized and configured on Xilinx Virtex5LX330 FPGA. It can operate at maximum 165MHz clock, giving the performance of 108 frame/sec, while detecting up to 20 faces.