• Journal of Electrical Engineering and Technology
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• v.9 no.1
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• pp.127-135
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• 2014

In this paper a novel converter structure based on cascade converter family is presented. The suggested multilevel advanced cascade converter has benefits such as reduction in number of switches and power losses. Comparison depict that proposed topology has the least number of IGBTs among all multilevel cascade type converters which have been introduced recently. This characteristic causes low cost and small installation area for suggested converter. The number of on state switches in current path is less than conventional topologies and so the output voltage drop and power losses are decreased. Symmetric and asymmetric modes are analyzed and compared with conventional multilevel cascade converter. Simulation and experimental results are presented to illustrate validity, good performance and effectiveness of the proposed configuration. The suggested converter can be applied in medium/high voltage and PV applications.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.532-533
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• 2013

본 논문에서는 다단 멀티레벨 컨버터(Cascaded Multilevel Converter) 방식으로 개발된 STATCOM에서 Phase-Shifted PWM 시 발생할 수 있는 개별 Cell 인버터의 출력 전압 위상 지연을 보상하여 시스템의 성능을 개선하였다.

• Journal of Electrical Engineering and Technology
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• v.8 no.6
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• pp.1328-1336
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• 2013

Nowadays multilevel inverters are developing generally due to reduced voltage stress on power switches and low total harmonic distortion (THD) in output voltage. However, for increasing the output voltage levels the number of circuit devices are increased and it results in increasing the cost of converter. In this paper, a novel multilevel inverter is proposed. The suggested topology uses less number of power switches and related gate drive circuits to generate the same level in output voltage with comparison to traditional cascaded multilevel inverter. With the proposed topology all levels in output voltage can be realized. As an illustration, a symmetric 13-level and asymmetric 29-level proposed inverters have been simulated and implemented. The total peak inverse (PIV) and power losses of presented inverter are calculated and compared with conventional cascaded multilevel inverter. The presented analyses show that the power losses in the suggested multilevel inverter are less than the traditional inverters. Presented simulation and experimental results demonstrate the feasibility and applicability of the proposed inverter to obtain the maximum number of levels with less number of switches.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1186-1194
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• 2017

This paper proposes an improved low frequency Selective Harmonic Mitigation-PWM (SHM-PWM) technique. The proposed method mitigates the low order harmonics of the output voltage up to the $50^{th}$ harmonic well and satisfies the grid codes EN 50160 and CIGRE-WG 36-05. Using a modified criterion for the switching angles, the range of the modulation index for non-linear SHM equations is improved, without increasing the switching frequency of the CHB converter. Due to the low switching frequency of the CHB converter, mitigating the harmonics of the converter up to the $50^{th}$ order and finding a wider modulation index range, the size and cost of the passive filters can be significantly reduced with the proposed technique. Therefore, the proposed technique is more efficient than the conventional SHM-PWM. To verify the effectiveness of the proposed method, a 7-level Cascaded H-bridge (CHB) converter is utilized for the study. Simulation and experimental results confirm the validity of the above claims.

• Journal of Electrical Engineering and Technology
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• v.6 no.2
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• pp.245-254
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• 2011

This paper presents a new group for multilevel converter that operates as symmetric and asymmetric state. The proposed multilevel converter generates DC voltage levels similar to other topologies with less number of semiconductor switches. It results in the reduction of the number of switches, losses, installation area, and converter cost. To verify the voltage injection capabilities of the proposed inverter, the proposed topology is used in dynamic voltage restorer (DVR) to restore load voltage. The operation and performance of the proposed multilevel converters are verified by simulation using SIMULINK/MATLAB and experimental results.

• Journal of Power Electronics
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• v.10 no.1
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• pp.34-42
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• 2010

Reliability is an important issue in cascaded H-bridge converters (CHB converters) because they use a high number of power semiconductors. A faulty power cell in a CHB converter can potentially lead to expensive downtime and great losses on the consumer side. With a fault-tolerant control strategy, operation can continue with the undamaged cells; thus increasing the reliability of the system. In this paper, the operating principles and the control method for a CHB multilevel rectifier are introduced. The influence of various faults on the CHB converter is investigated. The method of fault diagnosis and the bypassing of failed cells are explained. A fault-tolerant protection strategy is proposed to achieve redundancy in the CHB rectifier. The redundant H-bridge concept helps to deal with device failures and to increase system reliability. Simulation results verify the performance of the proposed strategy.

• Journal of Electrical Engineering and Technology
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• v.7 no.4
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• pp.538-545
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• 2012

In this paper a novel cascaded transformer multilevel inverter is proposed. Each basic unit of the inverter includes two DC sources, single phase transformers and semiconductor switches. This inverter, which operates as symmetric and asymmetric, can output more number of voltage levels in the same number of the switching devices. Besides, the number of gate driving circuits is reduced, which leads to circuit size reduction and lower power consumption in the driving circuits. Moreover, several methods to determination of transformers turn ratio in proposed inverter are presented. Theoretical analysis, simulation results using MATLAB/SIMULINK and experimental results are provided to verify the operation of the suggested inverter.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1163-1164
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• 2011

Cascaded H-bridge 멀티레벨인버터의 구동을 위해서는 독립된 입력전압원의 확보가 필요하다. 본 논문에서는 이러한 Cascaded H-bridge 멀티레벨 인버터의 구조적 제약을 극복하기 위해 Buck-boost 컨버터와 Flyback 컨버터의 결합을 이용한 단일입력전원 구동 방법을 제안한다. 제안된 회로의 이론적 분석을 수행하고 시뮬레이션을 통하여 타당성을 검증한다.

• Journal of Power Electronics
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• v.17 no.2
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• pp.522-532
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• 2017

This paper presents a novel integrated structure for a cascaded distribution static compensator (D-STATCOM) and distribution transformer for medium-voltage reactive power compensation. The cascaded multilevel converter is connected to a system via a group of special designed taps on the primary windings of the Dyn11 connection distribution transformer. The three-phase winding taps are symmetrically arranged and the connection point voltage can be decreased to half of the line-to-line voltage at most. Thus, the voltage stress for the D-STATCOM is reduced and a compromise between the voltage rating and the current rating can be achieved. The spare capacity of the distribution transformer can also be fully used. The working mechanism is explained in detail and a modified control strategy is proposed for reactive power compensation. Finally, both simulation and scaled-down prototype experimental results are provided to verify the feasibility and effectiveness of the proposed connection structure and control strategy.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.323-324
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• 2015

Recently, asymmetrical cascaded H-bridge multilevel inverter started to be highlighted as an alternative for the symmetrical cascaded H-bridge. The topology has a small number of part count compared to the symmetrical with higher number of levels. However, it has a drawback of the modulation index limitation which is relatively higher than its symmetrical counterpart, which causes a necessity of an extra voltage pre-regulator. In this paper, the single-sourced pre-regulator is unified with an inner single switch DC/DC converter isolated by coupled inductor. It leads to cost and size reduction. The proposed topology is verified using simulation results.