• Current Optics and Photonics
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• 제3권2호
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• pp.164-171
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• 2019

Photoluminescence (PL) properties of GaN-based light-emitting diodes (LEDs) were analyzed to study the effects of carrier leakage on the luminescence properties at room temperature. The electrical leakage and PL properties were compared for LEDs showing leakages at forward bias and an LED with an intentional leakage path formed by connecting a parallel resistance of various values. The leakages at the forward bias, which could be observed from the current-voltage characteristics, resulted in an increase in the excitation laser power density for the maximum PL efficiency (ratio of PL intensity to excitation power) as well as a reduction in the PL intensity. The effect of carrier leakages on PL properties was similar to the change in PL properties owing to a reduction of the photovoltage by a reverse current since the direction of the carrier movement under photoexcitation is identical to that of the reverse current. Valid relations between PL properties and electrical properties were observed as the PL properties deteriorated with an increase in the carrier leakage. The results imply that the PL properties of LED chips can be an indicator of the electrical properties of LEDs.

• 한국전자파학회논문지
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• 제22권4호
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• pp.489-499
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• 2011

RFID 기술은 각 사물에 전자 태그를 부착하고, 사물의 고유 ID를 무선으로 인식하여 해당 정보를 수집, 저장, 가공, 추적하는 기술로 다양한 분야에 적용되고 있다. 본 논문에서는 UHF 대역 RFID 리더 수신기에서 반송파 누설 신호를 억압하기 위한 새로운 방법을 제안하였다. 제안한 반송파 누설 전력 억압용-RF 전단부 구조를 갖는 리더는 리미터를 포함하는 비선형 경로를 통해 송신 반송파 누설 복제 신호를 생성한다. 리미팅 기능은 반송파 누설 신호의 주파수와 위상 정보는 유지하면서 태그의 진폭 변조 성분을 제거한다. 위상 천이기를 포함하는 선형 구간에 송신 반송파 누설 복제 신호를 주입함으로써 태그의 역산란 신호 손실 없이 리더 반송파 누설 신호를 효과적으로 억압할 수 있다. 제작된 반송파 누설 전력 억압 회로는 910 MHz 중심 주파수에서 반송파 누설 신호 대비 태그 신호 비가 36 dB 억압 효과를 달성하였음을 측정 결과를 통해 확인하였으며, 이는 시뮬레이션 결과와 일치한다.

• Current Optics and Photonics
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• 제3권6호
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• pp.516-521
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• 2019

The electrical leakage levels of GaN-based light-emitting diodes (LEDs) containing leakage paths are estimated using photoluminescence (PL) and photovoltaic properties under photoexcitation conditions. The PL intensity and open-circuit voltage (V_OC) decrease because of carrier leakages depending on photoexcitation conditions when compared with reference values for typical LED chips without leakage paths. Changes of photovoltage-photocurrent characteristics and PL intensity due to carrier leakage are employed to assess the leakage current levels of LEDs with leakage paths. The current corresponding to the reduced V_OC of an LED with leakage from the photovoltaic curve of a reference LED without leakage is matched with the leakage current calculated using the PL intensity reduction ratio and short-circuit current of the LED with leakage. The current needed to increase the voltage for an LED with a leakage under photoexcitation from V_OC of the LED up to V_OC of a reference LED without a leakage is identical to the additional current needed for optical turn-on of the LED with a leakage. The leakage current level estimated using the PL and photovoltaic properties under photoexcitation is consistent with the leakage level measured from the voltage-current characteristic obtained under current injection conditions.

• 전력전자학회논문지
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• 제27권5호
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• pp.446-454
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• 2022

This study proposes a carrier-based pulse width modulation (PWM) method for leakage current reduction and neutral point (NP) current control in a three-phase three-level converter, which is a carrier-based PWM version of the previously proposed low-frequency common mode voltage PWM. Three groups of space vectors with the same common mode voltage are used. When the averaged NP current needs to be positive or negative, the specific groups are employed to produce low-frequency common mode voltages. The validity of the proposed PWM method is verified through experiments.

• 전력전자학회논문지
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• 제20권6호
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• pp.509-516
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• 2015

The overmodulation characteristics of a carrier-based medium vector pulse width modulation (CBMVPWM) are examined in this study. CBMVPWM can completely eliminate leakage currents in a three-phase, three-level inverter using only the switching states with the same common mode voltage even in an overmodulation operation. The analytic equations for the magnitude of the output voltage and the switching frequency are derived for overmodulation operation, and the effect of dead time on the leakage current is demonstrated. This study presents the operating principle of CBMVPWM, basic overmodulation features, and simulations and experiments for operating verification.

• Journal of Electrical Engineering and Technology
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• 제11권2호
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• pp.393-404
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• 2016

In this paper, a carrier-based pulse with modulation (PWM) strategy for three-phase three-level inverter is dealt with, which can keep the common mode voltage constant with minimized switching frequency. The voltage gain and the switching frequency in overall operating ranges including overmodulation are investigated and the analytic equations are presented. Finally, the leakage current reduction effect is confirmed by carrying out simulation and experiment. It will be pointed out that the leakage current cannot be perfectly eliminated because of the dead time.

• KEPCO Journal on Electric Power and Energy
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• 제2권2호
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• pp.223-225
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• 2016

The newly proposed analysis method using a direct-current current-voltage (DCIV) simulation is introduced for investigating leakage current composing MOS transistor. From comparing the density and location of traps using DCIV method and investigating the leakage current of gate channel transistor, we proposed the graphical analysis method to correlate the DCIV current and leakage mechanism by the traps. And, our graphical method intuitively explains that leakage current in MOS transistor is well correlated with the DCIV current of the MOS transistor arrays due to two kinds of traps created by Fowler-Nordheim (F-N) stress and Hot carrier stress, respectively.

• 대한전자공학회논문지TC
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• 제39권11호
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• pp.40-46
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• 2002

본 논문에서는 CPW MMIC 실장시 발생되는 기생 공진 현상을 제거하기 위한 새로운 구조의 실리콘 MEMS 패키지를 제안하였다. 또한 세 가지 형태의 실리콘 칩 캐리어(gold-plated high resistivity, lightly doped, high resistivity) 상에 GaAs CPW 패턴을 제작하고 해석/측정함으로써, 제안된 패키지의 성능을 확인하였다. 해석 및 측정 결과 제안된 MEMS 패키지는 비저항이(resistivity) 15 ${\Omega}{\cdot}$㎝인 실리콘 캐리어(carrier)를 사용함으로써 기생 공진 현상을 효과적으로 억제시킬 수 있었다.

• ETRI Journal
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• 제42권5호
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• pp.773-780
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• 2020

A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

• 전자공학회논문지A
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• 제30A권12호
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• pp.77-87
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• 1993

PMOSFETs were studied on the effect of Hot-Carrier induced drain leakage current (Gate-Induced-Drain-Leakage). The result turned out that change in Vgl(drain voltage where 1pA/$\mu$m of drain leadage current flows) was largest in the Channel-Hot-Hole(CHH) injection condition and next was in dynamic stress and was smallest in electron trapping (Igmax) condition under various stress conditions. It was analyzed that if electron trapping occurrs in the overlap region of gate and drain(G/D), it reduces GIDL current due to increment of flat-band voltage(Vfb) and if CHH is injected, interface states(Nit) were generated and it increases GIDL current due to band-to-defect-tunneling(BTDT). Especially, under dynamic stress it was confirmed that increase in GIDL current will be high when electron injection was small and CHH injection was large. Therefore as applying to real circuit, low drain voltage GIDL(BTDT) was enhaced as large as CHH Region under various operating voltage, and it will affect the reliablity of the circuit.