• Title/Summary/Keyword: Carrier leakage

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Effects of Carrier Leakage on Photoluminescence Properties of GaN-based Light-emitting Diodes at Room Temperature

  • Kim, Jongseok;Kim, Seungtaek;Kim, HyungTae;Choi, Won-Jin;Jung, Hyundon
    • Current Optics and Photonics
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    • v.3 no.2
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    • pp.164-171
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    • 2019
  • Photoluminescence (PL) properties of GaN-based light-emitting diodes (LEDs) were analyzed to study the effects of carrier leakage on the luminescence properties at room temperature. The electrical leakage and PL properties were compared for LEDs showing leakages at forward bias and an LED with an intentional leakage path formed by connecting a parallel resistance of various values. The leakages at the forward bias, which could be observed from the current-voltage characteristics, resulted in an increase in the excitation laser power density for the maximum PL efficiency (ratio of PL intensity to excitation power) as well as a reduction in the PL intensity. The effect of carrier leakages on PL properties was similar to the change in PL properties owing to a reduction of the photovoltage by a reverse current since the direction of the carrier movement under photoexcitation is identical to that of the reverse current. Valid relations between PL properties and electrical properties were observed as the PL properties deteriorated with an increase in the carrier leakage. The results imply that the PL properties of LED chips can be an indicator of the electrical properties of LEDs.

A Novel Carrier Leakage Suppression Scheme for UHF RFID Reader (UHF 대역 RFID 리더 반송파 누설 억압 연구)

  • Jung, Jae-Young;Park, Chan-Won;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.4
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    • pp.489-499
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    • 2011
  • RFID technologies, which allow collecting, storing, processing, and tracking information by wirelessly recognizing the inherent ID of object through an attached electronic tag, have a variety of application areas. This paper presents a novel carrier leakage suppression RF(CLS-RF) front-end for ultra-high-frequency RF identification reader. The proposed reader CLS-RF front-end structure generates the carrier leakage replica through the nonlinear path that contains limiter. The limiting function only preserves the frequency and phase information of the leakage signal and rejects the amplitude modulated tag signal in the envelope. The carrier leakage replica is then injected into the linear path that contains phase shifter. Therefore, the carrier leakage signal is effectively cancelled out, while not affecting the gain of the desired tag backscattering signal. We experimentally confirm that the prototype shows a significant improvement in the leakage to signal ratio by up to 36 dB in 910 MHz, which is consistent with our simulation results.

Electrical Leakage Levels Estimated from Luminescence and Photovoltaic Properties under Photoexcitation for GaN-based Light-emitting Diodes

  • Kim, Jongseok;Kim, HyungTae;Kim, Seungtaek;Choi, Won-Jin;Jung, Hyundon
    • Current Optics and Photonics
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    • v.3 no.6
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    • pp.516-521
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    • 2019
  • The electrical leakage levels of GaN-based light-emitting diodes (LEDs) containing leakage paths are estimated using photoluminescence (PL) and photovoltaic properties under photoexcitation conditions. The PL intensity and open-circuit voltage (VOC) decrease because of carrier leakages depending on photoexcitation conditions when compared with reference values for typical LED chips without leakage paths. Changes of photovoltage-photocurrent characteristics and PL intensity due to carrier leakage are employed to assess the leakage current levels of LEDs with leakage paths. The current corresponding to the reduced VOC of an LED with leakage from the photovoltaic curve of a reference LED without leakage is matched with the leakage current calculated using the PL intensity reduction ratio and short-circuit current of the LED with leakage. The current needed to increase the voltage for an LED with a leakage under photoexcitation from VOC of the LED up to VOC of a reference LED without a leakage is identical to the additional current needed for optical turn-on of the LED with a leakage. The leakage current level estimated using the PL and photovoltaic properties under photoexcitation is consistent with the leakage level measured from the voltage-current characteristic obtained under current injection conditions.

Carrier Based LFCPWM for Leakage Current Reduction and NP Current Control in 3-Phase 3-Level Converter (3상 3-레벨 컨버터의 누설전류 저감과 NP 전류 제어를 위한 캐리어 기반 LFCPWM)

  • Lee, Eun-Chul;Choi, Nam-Sup
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.5
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    • pp.446-454
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    • 2022
  • This study proposes a carrier-based pulse width modulation (PWM) method for leakage current reduction and neutral point (NP) current control in a three-phase three-level converter, which is a carrier-based PWM version of the previously proposed low-frequency common mode voltage PWM. Three groups of space vectors with the same common mode voltage are used. When the averaged NP current needs to be positive or negative, the specific groups are employed to produce low-frequency common mode voltages. The validity of the proposed PWM method is verified through experiments.

Overmodulation Characteristics of Carrier Based MVPWM for Eliminating the Leakage Currents in Three-Level Inverter (3-레벨 인버터의 누설전류 제거를 위한 캐리어 기반 MVPWM의 과변조 특성)

  • Lee, Eun-Chul;Choi, Nam-Sup;Ahn, Kang-Soon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.6
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    • pp.509-516
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    • 2015
  • The overmodulation characteristics of a carrier-based medium vector pulse width modulation (CBMVPWM) are examined in this study. CBMVPWM can completely eliminate leakage currents in a three-phase, three-level inverter using only the switching states with the same common mode voltage even in an overmodulation operation. The analytic equations for the magnitude of the output voltage and the switching frequency are derived for overmodulation operation, and the effect of dead time on the leakage current is demonstrated. This study presents the operating principle of CBMVPWM, basic overmodulation features, and simulations and experiments for operating verification.

A Study on a Carrier Based PWM having Constant Common Mode Voltage and Minimized Switching Frequency in Three-level Inverter

  • Ahn, Kang-Soon;Choi, Nam-Sup;Lee, Eun-Chul;Kim, Hee-Jun
    • Journal of Electrical Engineering and Technology
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    • v.11 no.2
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    • pp.393-404
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    • 2016
  • In this paper, a carrier-based pulse with modulation (PWM) strategy for three-phase three-level inverter is dealt with, which can keep the common mode voltage constant with minimized switching frequency. The voltage gain and the switching frequency in overall operating ranges including overmodulation are investigated and the analytic equations are presented. Finally, the leakage current reduction effect is confirmed by carrying out simulation and experiment. It will be pointed out that the leakage current cannot be perfectly eliminated because of the dead time.

Experimental Study for Gate Trap and Generation Current using DCIV Method

  • Kim, Young Kwon;Lee, Dong Bin;Choi, Won Hyeok;Park, Taesik;Lee, Myoung Jin
    • KEPCO Journal on Electric Power and Energy
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    • v.2 no.2
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    • pp.223-225
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    • 2016
  • The newly proposed analysis method using a direct-current current-voltage (DCIV) simulation is introduced for investigating leakage current composing MOS transistor. From comparing the density and location of traps using DCIV method and investigating the leakage current of gate channel transistor, we proposed the graphical analysis method to correlate the DCIV current and leakage mechanism by the traps. And, our graphical method intuitively explains that leakage current in MOS transistor is well correlated with the DCIV current of the MOS transistor arrays due to two kinds of traps created by Fowler-Nordheim (F-N) stress and Hot carrier stress, respectively.

Design of Silicon MEMS Package for CPW MMICs (CPW MMIC 칩 실장을 위한 실리콘 MEMS 패키지 설계)

  • Kim, Jin-Yang;Kim, Sung-Jin;Lee, Hai-Young
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.11
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    • pp.40-46
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    • 2002
  • A MEMS(Micro Electro Mechanical System) package using a doped-silicon(Si) carrier for coplanar microwave and millimeter-wave integrated circuits is proposed in order to reduce parasitic problems of leakage, coupling and resonance. The proposed carrier scheme is verified by fabrication and measuring a GaAs CPW(Coplanar Waveguide) on the three types of Si-carriers(gold-plated high resistivity, lightly doped, high resistivity). The proposed MEMS package using the lightly doped(15 ${\Omega}{\cdot}$) Si-carrier shows parasitic-free performance since the lossy Si-carrier effectively absorbs and suppresses the resonant leakage.

A dual-path high linear amplifier for carrier aggregation

  • Kang, Dong-Woo;Choi, Jang-Hong
    • ETRI Journal
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    • v.42 no.5
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    • pp.773-780
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    • 2020
  • A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

Hot-Carrier Induced GIDL Characteristics of PMOSFETs under DC and Dynamic Stress (직류 및 교류스트레스 조건에서 발생된 Hot-Carrier가 PMOSFET의 누설전류에 미치는 영향)

  • 류동렬;이상돈;박종태;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.12
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    • pp.77-87
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    • 1993
  • PMOSFETs were studied on the effect of Hot-Carrier induced drain leakage current (Gate-Induced-Drain-Leakage). The result turned out that change in Vgl(drain voltage where 1pA/$\mu$m of drain leadage current flows) was largest in the Channel-Hot-Hole(CHH) injection condition and next was in dynamic stress and was smallest in electron trapping (Igmax) condition under various stress conditions. It was analyzed that if electron trapping occurrs in the overlap region of gate and drain(G/D), it reduces GIDL current due to increment of flat-band voltage(Vfb) and if CHH is injected, interface states(Nit) were generated and it increases GIDL current due to band-to-defect-tunneling(BTDT). Especially, under dynamic stress it was confirmed that increase in GIDL current will be high when electron injection was small and CHH injection was large. Therefore as applying to real circuit, low drain voltage GIDL(BTDT) was enhaced as large as CHH Region under various operating voltage, and it will affect the reliablity of the circuit.

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