• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1203-1205
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• 2007

Confinement of charge carrier and exciton is the essential factor for enhancing the efficiency and stability of the electrophosphorescent devices. The interplay between the properties of emitters and other adjacent layers are studied based on the physical interpretation with difference of energy level, charge carrier mobility, and corresponding charge-trapping behavior.

• Applied Science and Convergence Technology
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• 제24권5호
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• pp.167-171
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• 2015

Quantum-confined nanostructures open up additional perspectives in engineering materials with different electronic and optical properties. We have fabricated unique cation-exchanged CdS and CdS/CdSe quantum dots and measured their first four exciton transitions. We demonstrate that the relationship between electronic transitions and charge-carrier distributions is generalized for a broad range of core-shell nanostructures. These nanostructures can be used to further improve the performance in the fields of bio-imaging, light-emitting devices, photovoltaics, and quantum computing.

• 대한전자공학회논문지TE
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• 제37권5호
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• pp.17-27
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• 2000

SCH 양자우물 레이저에서 수치적 모델을 이용하여 캐리어의 양자우물 subband 점유에 따른 광 이득, 광 미분 이득과 재결합 전류를 계산하고, 이를 해석적 캐리어 포획 및 탈출 모델과 연계하여 양자우물 주입 전류와 SCH bulk 캐리어의 관계를 도출하였다. 이를 토대로 SCH 영역과 양자우물의 캐리어 비율과 전류 비율을 얻고, 이에 따른 광 이득과 광 미분 이득의 변화를 고찰하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.191.2-191.2
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• 2015

Details of carrier dynamics in self-assembled quantum dots (QDs) with a particular attention to nonradiative processes are not only interesting for fundamental physics, but it is also relevant to performance of optoelectronic devices and the exploitation of nanocrystals in practical applications. In general, the possible processes in such systems can be considered as radiative relaxation, carrier transfer between dots of different dimensions, Auger nonradiactive scattering, thermal escape from the dot, and trapping in surface and/or defects states. Authors of recent studies have proposed a mechanism for the carrier dynamics of time-resolved photoluminescence CdTe (a type II-VI QDs) systems. This mechanism involves the activation of phonons mediated by electron-phonon interactions. Confinement of both electrons and holes is strongly dependent on the thermal escape process, which can include multi-longitudinal optical phonon absorption resulting from carriers trapped in QD surface defects. Furthermore, the discrete quantized energies in the QD density of states (1S, 2S, 1P, etc.) arise mainly from ${\delta}$-functions in the QDs, which are related to different orbitals. Multiple discrete transitions between well separated energy states may play a critical role in carrier dynamics at low temperature when the thermal escape processes is not available. The decay time in QD structures slightly increases with temperature due to the redistribution of the QDs into discrete levels. Among II-VI QDs, wide-gap CdZnTe QD structures characterized by large excitonic binding energies are of great interest because of their potential use in optoelectronic devices that operate in the green spectral range. Furthermore, CdZnTe layers have emerged as excellent candidates for possible fabrication of ferroelectric non-volatile flash memory. In this study, we investigated the optical properties of CdZnTe/ZnTe QDs on Si substrate grown using molecular beam epitaxy. Time-resolved and temperature-dependent PL measurements were carried out in order to investigate the temperature-dependent carrier dynamics and the activation energy of CdZnTe/ZnTe QDs on Si substrate.

• 대한전자공학회논문지TE
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• 제37권1호
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• pp.27-34
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• 2000

본 논문에서는 SCH 양자우물 구조를 가진 레이저 다이오드에서의 캐리어 수송기구와 변조응답 특성에 대해 고찰하였다. 캐리어 수송구조 고찰을 위해 캐리어 밀도분포및 다이오드전류를 계산하였다. 또한 우물내에서의 캐리어 재결합율을 SCH길이의 함수로 도출하였다. 변조응답 특성에서는 캐리어와 광자에 대한 3쌍의 비율 방정식을 도출, 해석하여 SCH 길이에 따른 변조 대역폭과 완화 진동 주파수, 감쇄 비율과 K-factor의 특성에 대하여 고찰하였다.

• 대한전자공학회논문지SD
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• 제39권3호
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• pp.9-19
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• 2002

본 논문에서는 thermionic emission 모델을 이용하여 SCH 양자우물 레이저 다이오드에 대한 L-I-V특성을 해석적으로 도출하였다. SCH의 bulk 캐리어와 양자우물 속박 캐리어의 관계를 도출하였고, 주입된 전류를 각 영역에서의 캐리어 재결합을 고려한 전류 연속 방정식을 만족하도록 하였다. 또한, high level injection과 전하 중성 조건하에 ambipolar 확산 방정식을 이용하여 캐리어 분포를 고찰하였다. 위 해석적인 모델을 이용하여 계산한 결과, 클래딩 영역의 전위장벽 변화가 전류 전압 특성 변화의 주요 원인으로 나타났다. 또한 thermionic emission에 의한 주입 전류의 forward flux 증가가 캐리어 주입을 증가시키고, 레이저 다이오드의 직렬 저항을 감소시키는 것을 보였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.7-7
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• 2009

Lead telluride (PbTe) is a very promising thermoelectric material due to its narrow band gap (0.31 eV at 300 K), face-centered cubic structure and large average excitonic Bohr radius (46 nm) allowing for strong quantum confinement within a large range of size. In this work, we present the thermoelectric properties of individual single-crystalline PbTe nanowires grown by a vapor transport method. A combination of electron beam lithography and a lift-off process was utilized to fabricate inner micron-scaled Cr (5 nm)/Au (130 nm) electrodes of Rn (resistance of a near electrode), Rf (resistance of a far electrode) and a microheater connecting a PbTe nanowire on the grid of points. A plasma etching system was used to remove an oxide layer from the outer surface of the nanowires before the deposition of inner electrodes. The carrier concentration of the nanowire was estimated to be as high as $3.5{\times}10^{19}\;cm^{-3}$. The Seebeck coefficient of an individual PbTe nanowire with a radius of 68 nm was measured to be $S=-72{\mu}V/K$ at room temperature, which is about three times that of bulk PbTe at the same carrier concentration. Our results suggest that PbTe nanowires can be used for high-efficiency thermoelectric devices.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 춘계학술대회 논문집 센서 박막재료
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• pp.27-31
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• 2001

We fabricated organic electroluminescent(EL) devices with mixed emitting layer of poly(N-vinylcarbazole)(PVK), 2,5-bis(5'-tert-butyl-2-benzoxazoly)thiophene(BBOT), N,N'-diphenyl-N,N'-(3-methyphenyl)-1,1'-biphenyl-4, 4'-diarnine(TPD) and poly(3-hexylthiophene)(P3HT). To improve the external quantum efficiency of EL devices, we added the functional layer to the devices such as LiF insulating layer, carrier confinement layer(BBOT) and hole injection layer(CuPc). In the ITO/emitting layer/Al device, the maximum quantum efficiency at 15V was $1.88{\times}10^{-5}%$. And then, it is increased by a factor of 27 to $5.2{\times}10^{-3}%$ in ITO/CuPc/emitting layer/BBOT/LiF/Al device at 15V.

• ETRI Journal
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• 제20권2호
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• pp.231-240
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• 1998

We report, for the first time, the fabrication of vertically stacked InGaAs/GaAs quantum wires (QWRs) on V-grooved substrates by chemical beam epitaxy (CBE). To fabricate the vertically stacked QWRs structure, we have grown the GaAs resharpening barrier layers on V-grooves with (100)-(322) facet configuration instead of (100)-(111) base at 450 $^{\circ}C$. Under the conditions of low growth temperature, the growth rate of GaAs on the (322) sidewall is higher than that at the (100) bottom. Transmission electron microscopy verifies that the vertically stacked InGaAs QWRs were formed in sizes of about $200{\AA} {\times} 500{\sim}600 {\AA}$. Three distinct photoluminescence peaks related with side-quantum wells (QWLs), top-QWLs and QWRs were observed even at 200 K due to sufficient carrier and optical confinement. These results strongly suggest the existence of the quantized state in the vertically stacked InGaAs/GaAs QWRs grown by CBE.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.18-26
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• 2004

Back-gated silicon-on-insulator MOSFET -a threshold-voltage adjustable device-employs a constant back-gate potential to terminate source-drain electric fields and to provide carrier confinement in the channel. This suppresses shortchannel effects of nano-scale and of high drain biases, while allowing a means to threshold voltage control. We report here a theoretical analysis of this geometry to identify its natural length scales, and correlate the theoretical results with experimental device measurements. We also analyze experimental electrical characteristics for misaligned back-gate geometries to evaluate the influence on transport behavior from the device electrostatics due to the structure and position of the back-gate. The backgate structure also operates as a floating-gate nonvolatile memory (NVRAM) when the back-gate is floating. We summarize experimental and theoretical results that show the nano-scale scaling advantages of this structure over the traditional front floating-gate NVRAM.