• Journal of Power Electronics
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• v.18 no.2
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• pp.615-626
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• 2018

To ensure a DC current path and avoid large voltage overshoot of the DC-link inductor, alternating PWM pulses in the current-source rectifier should be supplemented by overlap time, which generates an overlap current and causes input current distortion. In this study, the influence of overlap time is illustrated by comparing the AC-side current before and after overlap time is added. The overlap current distribution caused by overlap time is discussed under different modulation carriers, including triangle carrier, positive-going carrier, and negative-going carrier. The quantitative relationship between the extra harmonics of the AC-side current and overlap time is based on the Fourier analysis. Based on the commutation analysis, a new carrier modulation scheme that can restrain overlap current is proposed. A 3 kW prototype is established to verify the effectiveness of the influence of overlap time and the proposed restraining modulation scheme.

• Journal of Power Electronics
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• v.16 no.2
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• pp.512-521
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• 2016

Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1791-1801
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• 2016

This paper considers a carrier based signal injection method for use in the three shunt sensing inverter (TSSI) for sensorless motor control. It also analyzes the loss according to the injection axis of the voltage signal. To remove both the phase current and rotor position sensors, a sensorless method and a phase current reconstruction method can be simultaneously considered. However, an interaction between the two methods can be incurred when both methods inject voltage signals simultaneously. In this paper, a signal injection based sensorless method with the 120° OFF Discontinuous PWM (DPWM) is implemented in a TSSI to avoid this interaction problem. Since one leg does not have a switching event for one sampling period in the 120° OFF DPWM, the switching loss is altered according to the injection axis. The switching loss in the d-axis injection case can be up to 32% larger than that in the q-axis injection case. Other losses according to the injection axis are also analyzed.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.431-433
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• 1995

Active Power Filters(APF) have been developed for several years to solve the harmonics disturbance problems on power system networks. This paper studies observer based digital algorithm and PWM technique for three phase current source APF by simulation. Both switching or outside white noises affect seriously at control signal for APF control system. Hence observer algorithm to reduce noises is used. A technique of generation gating patterns for the CSI topologies based on carrier PWM techniques is applied. The requirements imposed on gating signals are satisified by the appropriate combination of single phase switching patterns and short pulse generator.

• Journal of Power Electronics
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• v.3 no.2
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• pp.99-114
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• 2003

This paper presents a feasible development on a highly accurate quick response adjustable speed drive implementation fur general purpose induction motor which operates on the basis of sensorless slip frequency type vector controlled sine-wave PWM inverter with an automatic tuning machine parameter estimation schemes. In the first place, the sensorless vector control theory on the three-phase voltage source-fed inverter induction motor drive system is developed in slip frequency based vector control principle. In particular, the essential procedure and considerations to measure and estimate the exact stator and rotor circuit parameters of general purpose induction motor are discussed under its operating conditions. The speed regulation characteristics of induction motor operated by the three-phase voltage-fed type current controlled PWM inverter using IGBT's is illustrated and evaluated fur machine parameter variations under the actual conditions of low frequency and high frequency operations for the load torque. In the second place, the variable speed induction motor drive system, employing sensorless vector control scheme which is based on three -phase high frequency carrier PWM inverter with automatic toning estimation schemes of the temperature -dependent and -independent machine circuit parameters, is practically implemented using DSP-based controller. Finally, the dynamic speed response performances for largely changed load torque disturbances as well as steady state speed vs. torque characteristics of this induction motor control implementation are illustrated and discussed from an experimental point of view.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1081-1092
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• 2014

Renewable energy is being spotlighted as the electric power generating source for the next generation. Due to an increase in renewable energy systems in the grid system, their impact on the grid has become non-negligible. Thus, many countries in the world, including Europe, present their own grid codes for grid power conversion devices. In order to experiment with these grid codes, grid fault test equipment is required. This paper proposes both equipment and a control method, which are constructed with a 7-level cascaded H-bridge converter, that are capable of generating various grid faults. In addition, the Pulse Width Modulation (PWM) method for multilevel converters is compared and analyzed. The proposed structure, the control method, and the PWM method are verified through simulation and experimental results.

• Journal of Power Electronics
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• v.14 no.2
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• pp.271-281
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• 2014

Fluctuating wind conditions necessitate the use of a variable speed wind turbine (VSWT) with a AC/DC/AC converter scheme in order to harvest the maximum power from the wind and to decouple the synchronous generator voltage and frequency from the grid voltage and frequency. In this paper, a combination of a three phase diode bridge rectifier (DBR) and a modified topology of the diode clamped multilevel inverter (DCMLI) has been considered as an AC/DC/AC converter. A control strategy has been proposed for the DCMLI to achieve the objective of grid interface of a wind power system together with local load compensation. A novel fixed frequency current control method is proposed for the DCMLI based on the level shifted multi carrier PWM for achieving the required control objectives with equal and uniform switching frequency operation for better control and thermal management with the modified DCMLI. The condition of the controller gain is derived to ensure the operation of the DCMLI at the fixed frequency of the carrier. The converter current injected into the distribution grid is controlled in accordance with the wind power availability. In addition, load compensation is performed as an added facility in order to free the source currents being fed from the grid of harmonic distortion, unbalance and a low power factor even though the load may be unbalanced, non-linear and of a poor power factor. The results are validated using PSCAD/EMTDC simulation studies.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1552-1557
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• 2015

The paper unleashes a new idea to arrive at reduced switch count topological structures configured in the form of a matrix for a cascaded Multi level inverter (CMLI). The theory encircles to minimize the number of switches involved in the conduction path and there from acclaim reduced input current distortion, lower switching losses and electromagnetic interference. The focus extends to standardize the number of power devices required for reaching different levels of output voltage from the same architecture. It includes appropriate pulse width modulation (PWM) strategy to generate firing pulses and ensure the desired operation of the power modules. The investigative study carries with it MATLAB based simulation and experimental results obtained using suitable prototypes to illustrate the viability of the proposed concept. The promising nature of the performance projects a new dimension in the use of single phase MLIs for renewable energy related applications.

• Journal of Power Electronics
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• v.14 no.3
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• pp.499-506
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• 2014

This paper proposes a 3 kW single-phase bi-directional multi-level converter for energy storage applications. The proposed topology is based on the H-bridge structure with four switches connected to the DC-link. A simple phase opposition disposition PWM method that requires only one carrier signal is also suggested. The switching sequence to balance the capacitor voltage is considered. The topology can be extended to a nine-level converter or a three-phase system. The operating principle of the proposed converter is verified through a simulation and an experiment.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.407-409
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• 2006

This paper presents the methods of designing the control circuits for a Class D amplifier to have a peak performance. The proposed approach is based on the three functional components - a carrier generator, a feedback circuit and a dead-time circuit. First the analog signal is applied to the controller, which outputs the 3 level PWM waveform. The controller used for this experiment is made of the operational amplifier and the logic circuit. The experimental results show that the control circuit performs with satisfaction and its output is proportional to input audio signal, providing a satisfactory 3 level PWM pattern. From this design methodology, by implementing a proposed control circuit we can achieve the efficient Class D amplifier using the half-bridge, full-bridge or push-pull topology at the output stage.