• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.64-69
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• 2004

This paper deals with an algorithm for controlling ac output voltage of Z-source inverter using Modified SVPWM (abbreviated as MSVPWM). Unlike the conventional space vector pulse width modulation, MSVPWM has one extra shoot-through zero time $T_{sh}$. During shoot-through zero time, both switches in a leg are conducted simultaneously in order to boost inverter output voltage to any desirable value regardless the line voltage. The algorithm to control linearly the capacitor voltage is suggested to improve the performance of Z-source inverter system. The performance of Z-source inverter using above algorithms is demonstrated in simulation results using PSIM. Index terms-Z-source inverter (ZSI), shoot-through time, three-phase carrier-based PWM, space vector PWM (SVPWM), modified space vector PWM (MSVPWM).

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.579-587
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• 2014

This paper presents a variable gain amplifier (VGA) for an analog front-end (AFE) of ultrasound medical imaging. This VGA has a closed-loop topology and shows a 37-dB-linear characteristic with a single-stage amplifier. It consists of an op-amp, a non-binary-weighted capacitor array, and a gain-control block. This non-binary-weighted capacitor array reduces the required number of capacitors and the complexity of the gain-control block. The VGA has been fabricated in a 0.35-mm CMOS process. This work gives the largest gain range of 37 dB per stage, the largest P1 dB of 9.5 dBm at the 3.3-V among the recent VGA circuits available in the literature. The voltage gain is controlled in the range of [-10, 27] dB in a linear-in-dB scale with 16 steps by a 4-bit digital code. The VGA has a bandpass characteristic with a passband of [20 kHz, 8 MHz].

• Journal of the Korean Society of Safety
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• v.22 no.1 s.79
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• pp.36-39
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• 2007

It is important to know Minimum Ignition Energy(MIE) of flammable materials for ignition hazard of chemical processes etc.. Currently a capacitor discharge is used mainly to measure the MIE. Then, it is impossible to control actively discharge energies and discharge time because the MIE measurement uses a high voltage capacitor and fixed capacitor. However, the control of discharge energy and discharge time will be convenient if self-sustain discharge is used. In this paper, we measured the MIE by self-sustain discharge of a pulse shape to propose the new measuring method of the MIE. AS a result, ignition energies are increased gradually as discharge duration time gets longer, and discharge current grows larger. Also, an arc discharge and a glow discharge occurred during the experimental period, and the ignition by glow discharges happened when discharge duration time was $90{\mu}s$, discharge current was 8A and 1A Especially, the MIE occurred the 0.05mm and 0.08mm of the gap distance between discharge electrode in the same discharge duration time.

• Journal of Power Electronics
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• v.11 no.4
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• pp.576-582
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• 2011

This paper presents a novel control strategy for selective compensation of power quality (PQ) problems, depending upon the limited rating of voltage source inverters (VSIs), through a unified power quality conditioner (UPQC) in a three-phase four-wire distribution system. The UPQC is realized by the integration of series and shunt active power filters (APFs) sharing a common dc bus capacitor. The shunt APF is realized using a three-phase, four-leg voltage source inverter (VSI), while a three-leg VSI is employed for the series APF of the three-phase four-wire UPQC. The proposed control scheme for the shunt APF, decomposes the load current into harmonic components generated by consumer and distorted utility. In addition to this, the positive and negative sequence fundamental frequency active components, the reactive components and harmonic components of load currents are decomposed in synchronous reference frame (SRF). The control scheme of the shunt APF performs with priority based schemes, which respects the limited rating of the VSI. For voltage harmonic mitigation, a control scheme based on SRF theory is employed for the series APF of the UPQC. The performance of the proposed control scheme of the UPQC is validated through simulations using MATLAB software with its Simulink and Power System Block set toolboxes.

• Journal of Power Electronics
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• v.7 no.2
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• pp.97-108
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• 2007

This paper describes simple control structures for a vector controlled stand-alone induction generator (IG) for use under variable speeds. Different control principles, indirect vector control and deadbeat current control, are developed for a voltage source PWM converter and the three-phase variable speed squirrel-cage IG to regulate DC-link and generator voltages with a newly designed phase locked loop circuit. The required reactive power for the variable speed IG is supplied by means of a PWM converter and a capacitor bank to buildup the voltage of the IG without the need for a battery, to reduce the rating of the PWM converter while using only three sensors and to eliminate the harmonics generated by the PWM converter. These proposed schemes can be used efficiently for variable speed wind energy conversion systems. The measurements of the IG systems at various speeds and loads are given and show that these systems are capable of good AC and DC voltage regulation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.11
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• pp.1274-1281
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• 1988

A new voltage-controlled oscillator based on a voltage-controlled integrator has been developed. It consists of a Schmitt-trigger and a voltage-controlled integrator, which is realized by an operational transconductance amplifier (OTA) and a grounded capacitor. The input control voltage changes the time constant of the integrator, and hence the oscillation frequency. The SPICE simulation shows that a prototype circuit, which oscillates at 12.21 KHz at 0 V, has the conversion sencitivity 2,437 Hz/V and the residual nonlinearity less than 0.68% in a control voltage range from -2 V to 2 V. It also shows that the circuit provides a temperature drift less than + 250 ppm/$^{\circ}$C for frequencies up to 100 KHz.

• Journal of Power Electronics
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• v.17 no.2
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• pp.346-357
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• 2017

The Modular Multilevel Converter (MMC) is particularly attractive for medium and high power applications such as High-Voltage Direct Current (HVDC) systems. In order to reach a high voltage, the number of cascaded submodules (SMs) is generally very large. Thus, in the applications with hundreds or even thousands of SMs such as MMC-HVDCs, the sorting algorithm of the conventional voltage balancing strategy is extremely slow. This complicates the controller design and increases the hardware cost tremendously. This paper presents a Two-Way Merge Sort (TWMS) strategy based on the prediction of the capacitor voltages under ideal conditions. It also proposes an innovative Insertion Sort Correction for the TWMS (ISC-TWMS) to solve issues in practical engineering under non-ideal conditions. The proposed sorting methods are combined with the features of the MMC-HVDC control strategy, which significantly accelerates the sorting process and reduces the implementation efforts. In comparison with the commonly used quicksort algorithm, it saves at least two-thirds of the sorting execution time in one arm with 100 SMs, and saves more with a higher number of SMs. A 501-level MMC-HVDC simulation model in PSCAD/EMTDC has been built to verify the validity of the proposed strategies. The fast speed and high efficiency of the algorithms are demonstrated by experiments with a DSP controller (TMS320F28335).

• Journal of Power Electronics
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• v.7 no.3
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• pp.181-190
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• 2007

This paper presents a novel circuit topology of a DC bus line series switch and parallel snubbing capacitor-assisted soft-switching PWM full-bridge inverter type DC-DC power converter with a high frequency planar transformer link, which is newly developed for high performance arc welding machines in industry. The proposed DC-DC power converter circuit is based upon a voltage source-fed H type full-bridge soft-switching PWM inverter with a high frequency transformer. This DC-DC power converter has a single power semiconductor switching device in series with an input DC low side rail and loss less snubbing capacitor in parallel with the inverter bridge legs. All the active power switches in the full-bridge arms and DC bus line can achieve ZCS turn-on and ZVS turn-off transition commutation. Consequently, the total switching power losses occurred at turn-off switching transition of these power semiconductor devices; IGBTs can be reduced even in higher switching frequency bands ranging from 20 kHz to 100 kHz. The switching frequency of this DC-DC power converter using IGBT power modules can be realized at 60 kHz. It is proved experimentally by power loss analysis that the more the switching frequency increases, the more the proposed DC-DC power converter can achieve a higher control response performance and size miniaturization. The practical and inherent effectiveness of the new DC-DC converter topology proposed here is actually confirmed for low voltage and large current DC-DC power supplies (32V, 300A) for TIG arc welding applications in industry.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.9
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• pp.21-26
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• 2016

This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 MHz consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a $0.18{\mu}m$ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.41-46
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• 2012

A quadrature voltage controlled oscillator(QVCO) for X-band is presented in this paper. The QVCO has fabricated in Charted $0.13{\mu}m$ CMOS process. The QVCO consists of two cross-coupled differential VCO and two differential buffers. The QVCO is controlled by 4 bit of capacitor bank and control voltage of varactor. To have a linear quality factor of varactors, voltage biases of varactors are difference. The QVCO generates frequency tuning range from 6.591 GHz to 8.012 GHz. The phase noise is -101.04 dBc/Hz at 1MHz Offset when output frequency is 7.150 GHz. The supply voltage is 1.5 V and core current 6.5-8.5 mA.