• Title/Summary/Keyword: Capacitor Quality

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A Study on the Test Method of RLC Parallel Circuits on the Device-Mounted Electronic Circuit Board (부품이 실장된 전자회로보드의 RLC 병렬회로 검사기법에 대한 연구)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.8
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    • pp.475-481
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    • 2005
  • In the existing ICT technique, the mounted electronic devices on the printed circuit board are tested whether the devices are good or not by comparing and measuring the value of the devices after separating the devices to be tested from around it based on the guarding method. But, in case that resistance, inductor and capacitor are configured as a parallel circuit on the circuit pattern, values for each device can not be measured because the total impedance value of the parallel circuit is measured. Accordingly, it is impossible to test whether the parallel circuit is good or not in case that the measured impedance value is within the tolerance error. Also, it is difficult to identify that which device among R, L and C of the parallel circuit is bad in case that the measured impedance value is out of the tolerance error. Accordingly, this paper proposes a test method which can enhance the quality and productivity by separating and measuring accurately R, L and C components from the RLC parallel circuits on the device-mounted printed circuit board. First, the RLC parallel circuit to be test is separated electrically from around it using three-terminal guarding technique. And then R, L and C values are computed based on the total impedance values and phase angles between voltage and current of the parallel circuit measured from two AC input signals with other frequency, Finally, the availability and accuracy of the proposed test method is verified by reviewing the simulation results.

Fabrication and Electrical Properties of Al2O3/GaN MIS Structures using Remote Plasma Atomic Layer Deposition (원격 플라즈마 원자층 증착법을 이용한 Al2O3/GaN MIS 구조의 제작 및 전기적 특성)

  • Yun, Hyeong-Seon;Kim, Hyun-Jun;Lee, Woo-Seok;Kwak, No-Won;Kim, Ka-Lam;Kim, Kwang-Ho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.4
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    • pp.350-354
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    • 2009
  • $Al_{2}O_{3}$ thin films were deposited on GaN(0001) by using a Remote Plasma Atomic Layer Deposition(RPALD) technique with a trimethylaluminum(TMA) precursor and oxygen radicals in the temperature range of $25{\sim}500^{\circ}C$. The growth rate per cycle was varied with the substrate temperature from $1.8{\AA}$/cycle at $25^{\circ}C$ to $0.8{\AA}$/cycle at $500^{\circ}C$. The chemical structure of the $Al_{2}O_{3}$ thin films was studied using X-ray photoelectron spectroscopy(XPS). The electrical properties of $Al_{2}O_{3}$/GaN Metal-Insulator-Semiconductor (MIS) capacitor grown at a $300^{\circ}C$ process temperature were excellent, a low electrical leakage current density(${\sim}10^{-10}A/cm^2$ at 1 MV) at room temperature and a high dielectric constant of about 7.2 with a thinner oxide thickness of 12 nm. The interface trap density($D_{it}$) was estimated using a high-frequency C-V method measured at $300^{\circ}C$. These results show that the RPALD technique is an excellent choice for depositing high-quality $Al_{2}O_{3}$ as a Sate dielectric in GaN-based devices.

Electrical characteristics of 4H-SiC MIS Capacitors With Ni/CNT/SiO2 Structure (Ni/CNT/SiO2 구조의 4H-SiC MIS 캐패시터의 전기적 특성)

  • Lee, Taeseop;Koo, Sang-Mo
    • Journal of IKEEE
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    • v.18 no.4
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    • pp.620-624
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    • 2014
  • In this study, the electrical characteristics of Ni/CNT/$SiO_2$ structures were investigated in order to analyze the mechanism of carbon nanotubes in 4H-SiC MIS device structures. We fabricated 4H-SiC MIS capacitors with or without carbon nanotubes. Carbon nanotubes were dispersed by isopropyl alcohol. The capacitance-voltage (C-V) is characterized at 300 to 500K. The experimental flat-band voltage ($V_{FB}$) shift was positive. Near-interface trapped charge density and oxide trapped charge density values of Ni/CNT/$SiO_2$ structure were less than values of reference samples. With increasing temperature, the flat-band voltage was negative. It has been found that its oxide quality is related to charge carriers or defect states in the interface of 4H-SiC MIS capacitors. Gate characteristics of 4H-SiC MIS capacitors can be controlled by carbon nanotubes between Ni and $SiO_2$.

Formation of SiOF Thin Films by FTES/$O_2$-PECVD Method (FTES/$O_2$-PECVD 방법에 의한 SiOF 박막형성)

  • Kim, Duk-Soo;Lee, Ji-Hyeok;Lee, Kwang-Man;Gang, Dong-Sik;Choe, Chi-Kyu
    • Korean Journal of Materials Research
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    • v.9 no.8
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    • pp.825-830
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    • 1999
  • Characteristics of SiOF films deposited by a FTES/$O_2$-plasma enhanced chemical vapor deposition method have been investigated using Fourier transform infrared spectroscopy, X-ray photoelectro spectroscopy, and ellipsometry. Electrical properties such as dielectric constant, dielectric breakdown and leakage current density are investigated using C-V and I-V measurements with MIS(Au/SiOF/p-Si) capacitor structure. Stepcoverage of the films have been also characterized using scanning electron microscopy and ellipsometry. A high quality SiOF film was formed on that the flow rates of FTES and $O_2$were 300sccm, respectively. The dielectric constant of the deposited SiOF film was about 3.1. This value is lower than that of the oxide films obtained using other method. The dielectric breakdown field and leakage current are more than 10MV/cm and about $8[\times}10^{9}A/\textrm{cm}^2$, respectively. The deposited SiOF film with thickness as $2500{\AA}$ on the $0.3{\mu}{\textrm}{m}$ metal pattern shows a high step-coverage without a void.

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Reduction of Gamma Distortion in Oblique Viewing Directions in Polymer-stabilized Vertical Alignment Liquid Crystal Mode

  • Kim, Hyo Joong;Lim, Young Jin;Murali, G.;Kim, Min Su;Kim, Gi Heon;Kim, Yong Hae;Lee, Gi-Dong;Lee, Seung Hee
    • Current Optics and Photonics
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    • v.1 no.2
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    • pp.157-162
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    • 2017
  • In large liquid crystal displays, the image quality in an oblique viewing direction is a crucial issue. From this perspective, 8-domain polymer-stabilized vertical alignment (PS-VA) mode has been developed to suppress the color shift in oblique viewing directions, compared to that in 4-domain PS-VA mode. To realize the 8-domain PS-VA, the four domains in a pixel are each divided into two regions, such that applying different electric potentials result in different tilt angles in these two regions, while keeping four azimuthal directions in each domain. However, applying different voltages in a pixel causes drawbacks, such as requiring additional processes to construct a capacitor and a transistor, which will further reduce the aperture ratio. Here we propose a different approach to form the 8-domain, by controlling surface polar anchoring energy and the width of patterned electrodes in two regions of a pixel. As a result, the gamma-distortion index (GDI), measured at an azimuthal angle of $0^{\circ}$, is reduced by about 23% and 8%, compared to that of a conventional 4-domain at polar angles of $30^{\circ}$ and $60^{\circ}$ respectively.

Input LC Fiter Design of Diode Rectifiers Considering Filter VA Rating Reduction (필터소자의 용량 저감을 고려한 다이오드 정류기의 입력LC필터 설계)

  • 임영철;정영국
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.12 no.1
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    • pp.35-44
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    • 1998
  • In this paper, input LC filter design of diode rectifiers considering filter V A rating reduction has been propoesd. It consisted of an input LC parallel resonent tank whose inductor and capacitor values are se$.$ lected so that the input filter presents an infinite impedance to harmonic input ac current component. The operation of proposed input filter has been analyzed in detail under steady state conditions. Performance evaluation and related design data have been provided on Per Unit basis for the proper implementation of diode rectification system. Finally, Detailed input and output current analysis has shown that the proposed input filter yield high quality input ac current waveforms, in particular, high input power factor values and more reliabilty which reducing the V A rating of passive components as compared to the standard type LC filter.filter.

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Calculation of the Harmonic Emission Limit for low-Voltage Electrical Equipment (국내 저압 전기기기의 고조파 유출 제한값 산정)

  • Kang, Moon-Ho;Song, Yang-Hoi;Lee, Heung-Ho
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.10
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    • pp.56-61
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    • 2008
  • Because the harmonic disturbance characteristic which makes voltage drop and the deterioration of instantaneous power quality in electrical power system overheats the NGR and the customer capacitor and malfunctions the OCGR and AMR, it is necessary for electric power company to take active measures to reduce this disturbance. International Electrotechnical Commission(IEC) 61000-3-2 specifies limits for harmonic current emissions generated by low voltage(LV) electrical equipment whose input current $\leq$ 16(A) per phase. Analysis shows that limits for Class A equipment in IEC are calculated using the reference impedance of LV system and maximum permissible voltage and limits for other Classes are also calculated based on limits for Class A. Therefore we have calculated four(4) internal limits for LV electrical equipment using the korea reference impedance and maximum permissible voltage in this paper.

Compensation of Voltage Drop Using the TSC-SVC in Electric Railway Power Supply System (전기철도 AT 급전시스템에서의 TSC-SVC를 이용한 전압강하 보상)

  • 정현수;방성원;김진오
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.3
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    • pp.29-36
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    • 2002
  • Recently, power quality problems in AC high-Speed Railway system have been raised, because heavy train and its higher speed are required in addition to new control system by using the Electronic devices. The installation/operation of the Series Capacitor(SC) has been only a device far voltage drop in power system up to now. However, the sufficient effectiveness of compensating In voltage drop has not been proved yet because of technical limitationf SC, and harmonic resonance is attracting a attention as one of new issues. Several problems are expected such as vocational problems of a traction substation, and overloading caused by a new construction of electric railway and the in transport. Therefore, extension of power feeding the fault in the traction substation should be also considered. So this paper represents the application of TSC-SVC on the electric railway power feeding system as a device of voltage compensation, and the simulations are executed through PSCAD/EMTDC.

PWM-based Integral Sliding-mode Controller for Unity Input Power Factor Operation of Indirect Matrix Converter

  • Rmili, Lazhar;Hamouda, Mahmoud;Rahmani, Salem;Blanchette, Handy Fortin;Al-Haddad, Kamal
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.1048-1057
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    • 2017
  • An indirect matrix converter (IMC) is a modern power generation system that enables a direct ac/ac conversion without the need for any bulky and limited lifetime electrolytic capacitor. This system also allows four-quadrant operation, generation of sinusoidal output voltage waveforms with variable frequency and amplitude, and control of input power factor. This study proposes a pulse-width modulation-based sliding-mode controller to achieve unity input-power factor operation of the IMC independently of the active power exchanged with the grid, as well as a fast dynamic response. The designed equivalent control law determines, at each sampling period, the appropriate q-axis component of the modulated input current to be injected into the grid through the LC input filter. An integral term of the error is included in the expression of the sliding surface to increase the accuracy of the control method. A double space vector modulation method is used to synthesize the direction of the space vector of the input currents as required by the sliding-mode controller and the space vectors of the target output voltages. Simulation and experimental results are provided to show the effectiveness and evaluate the performance of the proposed control method.

Determination of the Hybrid Energy Storage Capacity for Wind Farm Output Compensation (풍력발전단지 출력보상용 하이브리드 에너지저장장치의 용량산정)

  • Kim, Seong Hyun;Jin, Kyung-Min;Oh, Sung-Bo;Kim, Eel-Hwan
    • Journal of the Korean Solar Energy Society
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    • v.33 no.4
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    • pp.23-30
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    • 2013
  • This paper presents the determination method of the hybrid energy storage capacity for compensating the output of wind power when disconnecting from the grid. In the wind power output compensation, a lot of charging and discharging time with lithium-ion battery will be deteriorated the life time. And also, this fluctuation will cause some problems of the power quality and power system stability. To solve these kind of problems, many researchers in the world have been studied with BESS(Battery Energy Storage System) in the wind farm. But, BESS has the limitation of its output during very short term period, this means that it is difficult to compensate the very short term output of wind farm. Using the EDLC (Electric Double Layer Capacitor), it is possible to solve the problem. Installing the battery system in the wind farm, it will be possible to decrease the total capacity of BESS consisting of HESS (Hybrid Energy Storage System). This paper shows simulation results when not only BESS is connected to wind farm but also to HESS. To verify the proposed system, results of computer simulation using PSCAD/EMTDC program with actual output data of wind farms of Jeju Island will be presented.