• Title/Summary/Keyword: Cache Replacement Scheme

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Cooperative Content Caching and Distribution in Dense Networks

  • Kabir, Asif
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.11
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    • pp.5323-5343
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    • 2018
  • Mobile applications and social networks tend to enhance the need for high-quality content access. To address the rapid growing demand for data services in mobile networks, it is necessary to develop efficient content caching and distribution techniques, aiming at significantly reduction of redundant content transmission and thus improve content delivery efficiency. In this article, we develop optimal cooperative content cache and distribution policy, where a geographical cluster model is designed for content retrieval across the collaborative small cell base stations (SBSs) and replacement of cache framework. Furthermore, we divide the SBS storage space into two equal parts: the first is local, the other is global content cache. We propose an algorithm to minimize the content caching delay, transmission cost and backhaul bottleneck at the edge of networks. Simulation results indicates that the proposed neighbor SBSs cooperative caching scheme brings a substantial improvement regarding content availability and cache storage capacity at the edge of networks in comparison with the current conventional cache placement approaches.

Multi-layer Caching Scheme Considering Sub-graph Usage Patterns (서브 그래프의 사용 패턴을 고려한 다중 계층 캐싱 기법)

  • Yoo, Seunghun;Jeong, Jaeyun;Choi, Dojin;Park, Jaeyeol;Lim, Jongtae;Bok, Kyoungsoo;Yoo, Jaesoo
    • The Journal of the Korea Contents Association
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    • v.18 no.3
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    • pp.70-80
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    • 2018
  • Due to the recent development of social media and mobile devices, graph data have been using in various fields. In addition, caching techniques for reducing I/O costs in the process of large capacity graph data have been studied. In this paper, we propose a multi-layer caching scheme considering the connectivity of the graph, which is the characteristics of the graph topology, and the history of the past subgraph usage. The proposed scheme divides a cache into Used Data Cache and Prefetched Cache. The Used Data Cache maintains data by weights according to the frequently used sub-graph patterns. The Prefetched Cache maintains the neighbor data of the recently used data that are not used. In order to extract the graph patterns, their past history information is used. Since the frequently used sub-graphs have high probabilities to be reused, they are cached. It uses a strategy to replace new data with less likely data to be used if the memory is full. Through the performance evaluation, we prove that the proposed caching scheme is superior to the existing cache management scheme.

SSD based Second Disk Cache Replacement Scheme (SSD 기반 보조 디스크 캐시 교체 기법)

  • Ryu, Yeon-Joong;Youn, Hee-Yong
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2014.07a
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    • pp.343-345
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    • 2014
  • 플래시 메모리의 인기가 증가하면서 스토리지 시스템의 변화를 가져왔다. 플래시 메모리 기반의 SSD(Solid State Disk)는 기존의 HDD(Hard Disk Drive)를 대체할 매체로 주목을 받고 있으며 HDD에 비해 훨씬 더 높은 대역폭, 랜덤 접근 성능 및 충격에 강한 장점들을 갖는다. 그러나 플래시 메모리는 HDD와 달리 덮어쓰기(In-Place update)가 불가능 하기 때문에, 데이터를 업데이트 하기 위해서는 해당영역을 지운 후 업데이트를 해야 하는 단점이 있다. 본 논문에서는 캐시 안에서의 거의 접근하지 않을 블락과 캐시로 들어가는 것을 막기 위한 기법을 제시한다. 이것은 캐시의 오염을 막고 더 오랜 기간 동안 캐시 안에서 인기 있는 블락 들을 유지하고 높은 히트율로 연결될 것이다. 또한 캐시 교체의 수를 줄임으로써 SSD의 쓰기를 감소할 것이고 그 결과 성능 뿐만 아니라 SSD의 수명도 연장 에도 도움이 될 것이다.

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Block Replacement Scheme based on Reuse Interval for Hybrid SSD System (Hybrid SSD 시스템을 위한 재사용 간격 기반 블록 교체 기법)

  • Yoo, Sanghyun;Kim, Kyung Tae;Youn, Hee Yong
    • Journal of Internet Computing and Services
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    • v.16 no.5
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    • pp.19-27
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    • 2015
  • Due to the advantages of fast read/write operation and low power consumption, SSD(Solid State Drive) is now widely adopted as storage device of smart phone, laptop computer, server, etc. However, the shortcomings of SSD such as limited number of write operations and asymmetric read/write operation lead to the problem of shortened life span of SSD. Therefore, the block replacement policy of SSD used as cache for HDD is very important. The existing solutions for improving the lifespan of SSD including the LARC scheme typically employ the LRU algorithm to manage the SSD blocks, which may increase the miss rate in SSD due to the replacement of frequently used block instead of rarely used block. In this paper we propose a novel block replacement scheme which considers the block reuse interval to effectively handle various data read/write patterns. The proposed scheme replaces the block in SSD based on the recency decided by reuse interval and age along with hit ratio. Computer simulation using workload trace files reveals that the proposed scheme consistently improves the performance and lifespan of SSD by increasing the hit ratio and decreasing the number of write operations compared to the existing schemes including LARC.

A Block Replacement Scheme using Analytic Hierarchy Process in Hybrid HDD (하이브리드 하드디스크에서 AHP를 적용한 블록 교체 기법)

  • Kim, Jeong-Won
    • Journal of Korea Society of Industrial Information Systems
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    • v.20 no.5
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    • pp.45-52
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    • 2015
  • The read performance of hybrid hard disk is better than the legacy hard disk and power consumption is also considerably low. As blocks with enough localities may be located in the non-volatile cache whose size is generally limited, an effective block replacement scheme is required. As this replacement is inevitably affected by various parameters, we define this issue as a kind of multiple criteria decision model. To solve this problem, this paper suggests a new block replacement algorithm based on the analytic hierarchy process. Through simulation for our model, we confirmed that the proposed model could be used as a replacement algorithm of the hybrid hard disk as it may improve boot time as well as response time of general applications.

An Energy-Delay Efficient System with Adaptive Victim Caches (선택적 희생 캐쉬를 이용한 저전력 고성능 시스템 설계 방안)

  • Kim Cheol Hong;Shim Sunghoon;Jhon Chu Shik;Jhang Seong Tae
    • Journal of KIISE:Computer Systems and Theory
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    • v.32 no.11_12
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    • pp.663-674
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    • 2005
  • We propose a system aimed at achieving high energy-delay efficiency by using adaptive victim caches. Particularly, we investigate methods to improve the hit rates in the first level of memory hierarchy, which reduces the number of accesses to mort power consuming memory structures such as L2 cache. Victim cache is a memory element for reducing conflict misses in a direct-mapped L1 cache. We present two techniques to fill the victim cache with the blocks that have higher probability to be re-reqeusted by processor. Hit-based victim cache ks tilled with the blocks which were referenced frequently by processor. Replacement-based victim cache is filled with the blocks which were evicted from the sets where block replacements had happened frequently According to our simulations, replacement-based victim cache scheme outperforms the conventional victim cache scheme about $2\%$ on average and refutes the power consumption by up to $8\%$.

An Efficient Buffer Cache Management Scheme for Heterogeneous Storage Environments (이기종 저장 장치 환경을 위한 버퍼 캐시 관리 기법)

  • Lee, Se-Hwan;Koh, Kern;Bahn, Hyo-Kyung
    • Journal of KIISE:Computer Systems and Theory
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    • v.37 no.5
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    • pp.285-291
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    • 2010
  • Flash memory has many good features such as small size, shock-resistance, and low power consumption, but the cost of flash memory is still high to substitute for hard disk entirely. Recently, some mobile devices, such as laptops, attempt to use both flash memory and hard disk together for taking advantages of merits of them. However, existing OSs (Operating Systems) are not optimized to use the heterogeneous storage media. This paper presents a new buffer cache management scheme. First, we allocate buffer cache space according to access patterns of block references and the characteristics of storage media. Second, we prefetch data blocks selectively according to the location of them and access patterns of them. Third, we moves destaged data from buffer cache to hard disk or flash memory considering the access patterns of block references. Trace-driven simulation shows that the proposed schemes enhance the buffer cache hit ratio by up to 29.9% and reduce the total I/O elapsed time by up to 49.5%.

Implementation of Memory Efficient Flash Translation Layer for Open-channel SSDs

  • Oh, Gijun;Ahn, Sungyong
    • International journal of advanced smart convergence
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    • v.10 no.1
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    • pp.142-150
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    • 2021
  • Open-channel SSD is a new type of Solid-State Disk (SSD) that improves the garbage collection overhead and write amplification due to physical constraints of NAND flash memory by exposing the internal structure of the SSD to the host. However, the host-level Flash Translation Layer (FTL) provided for open-channel SSDs in the current Linux kernel consumes host memory excessively because it use page-level mapping table to translate logical address to physical address. Therefore, in this paper, we implemente a selective mapping table loading scheme that loads only a currently required part of the mapping table to the mapping table cache from SSD instead of entire mapping table. In addition, to increase the hit ratio of the mapping table cache, filesystem information and mapping table access history are utilized for cache replacement policy. The proposed scheme is implemented in the host-level FTL of the Linux kernel and evaluated using open-channel SSD emulator. According to the evaluation results, we can achieve 80% of I/O performance using the only 32% of memory usage compared to the previous host-level FTL.

Characteristics and Automatic Detection of Block Reference Patterns (블록 참조 패턴의 특성 분석과 자동 발견)

  • Choe, Jong-Mu;Lee, Dong-Hui;No, Sam-Hyeok;Min, Sang-Ryeol;Jo, Yu-Geun
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.9
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    • pp.1083-1095
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    • 1999
  • 최근 처리기와 입출력 시스템의 속도 차이가 점점 커짐에 따라 버퍼 캐쉬의 효율적인 관리가 더욱 중요해지고 있다. 버퍼 캐쉬는 블록 교체 정책과 선반입 정책에 의해 관리되며, 각 정책은 버퍼 캐쉬에서 블록의 가치 즉 어떤 블록이 더 가까운 미래에 참조될 것인가를 결정해야 한다. 블록의 가치는 응용들의 블록 참조 패턴의 특성에 기반하며, 블록 참조 패턴의 특성에 대한 정확한 분석은 올바른 결정을 가능하게 하여 버퍼 캐쉬의 효율을 높일 수 있다. 본 논문은 각 응용들의 블록 참조 패턴에 대한 특성을 분석하고 이를 자동으로 발견하는 기법을 제안한다. 제안된 기법은 블록의 속성과 미래 참조 거리간의 관계를 이용해 블록 참조 패턴을 발견한다. 이 기법은 2 단계 파이프라인 방법을 이용하여 온라인으로 참조 패턴을 발견할 수 있으며, 참조 패턴의 변화가 발생하면 이를 인식할 수 있다. 본 논문에서는 8개의 실제 응용 트레이스를 이용해 블록 참조 패턴의 발견을 실험하였으며, 제안된 기법이 각 응용의 블록 참조 패턴을 정확히 발견함을 확인하였다. 그리고 발견된 참조 패턴 정보를 블록 교체 정책에 적용해 보았으며, 실험 결과 기존의 대표적인 블록 교체 정책인 LRU에 비해 최대 57%까지 디스크 입출력 횟수를 줄일 수 있었다.Abstract As the speed gap between processors and disks continues to increase, the role of the buffer cache located in main memory is becoming increasingly important. The buffer cache is managed by block replacement policies and prefetching policies and each policy should decide the value of block, that is which block will be accessed in the near future. The value of block is based on the characteristics of block reference patterns of applications, hence accurate characterization of block reference patterns may improve the performance of the buffer cache. In this paper, we study the characteristics of block reference behavior of applications and propose a scheme that automatically detects the block reference patterns. The detection is made by associating block attributes of a block with the forward distance of the block. With the periodic detection using a two-stage pipeline technique, the scheme can make on-line detection of block reference patterns and monitor the changes of block reference patterns. We measured the detection capability of the proposed scheme using 8 real workload traces and found that the scheme accurately detects the block reference patterns of applications. Also, we apply the detected block reference patterns into the block replacement policy and show that replacement policies appropriate for the detected block reference patterns decreases the number of DISK I/Os by up to 57%, compared with the traditional LRU policy.

The Early Write Back Scheme For Write-Back Cache (라이트 백 캐쉬를 위한 빠른 라이트 백 기법)

  • Chung, Young-Jin;Lee, Kil-Whan;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.101-109
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    • 2009
  • Generally, depth cache and pixel cache of 3D graphics are designed by using write-back scheme for efficient use of memory bandwidth. Also, there are write after read operations of same address or only write operations are occurred frequently in 3D graphics cache. If a cache miss is detected, an access to the external memory for write back operation and another access to the memory for handling the cache miss are operated simultaneously. So on frequent cache miss situations, as the memory access bandwidth limited, the access time of the external memory will be increased due to memory bottleneck problem. As a result, the total performance of the processor or the IP will be decreased, also the problem will increase peak power consumption. So in this paper, we proposed a novel early write back cache architecture so as to solve the problems issued above. The proposed architecture controls the point when to access the external memory as to copy the valid data block. And this architecture can improve the cache performance with same hit ratio and same capacity cache. As a result, the proposed architecture can solve the memory bottleneck problem by preventing intensive memory accesses. We have evaluated the new proposed architecture on 3D graphics z cache and pixel cache on a SoC environment where ARM11, 3D graphic accelerator and various IPs are embedded. The simulation results indicated that there were maximum 75% of performance increase when using various simulation vectors.