• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.39-42
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• 2002

Recently, CMP (chemical mechanical polishing) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, COO (cost of ownership) and COC (cost of consumables) were relatively increased because of expensive slurry. In this paper, we have studied the possibility of recycle of reused silica slurry in order to reduce the costs of CMP slurry. The post-CMP thickness and within-wafer non-uniformity(WIWNU) were measured as a function of different slurry composition. As a experimental result, the performance of reused slurry with annealed silica abrasive of 2 wt% contents was showed high removal rate and low non-uniformity. Therefore, we propose two-step CMP process as follows In the first-step CMP, we can polish the thick and rough film surface using remaked slurry, and then, in the second-step CMP, we can polish the thin film and fine pattern using original slurry. In summary, we can expect the saving of high costs of slurry.

• Transactions on Electrical and Electronic Materials
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• v.10 no.3
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• pp.71-74
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• 2009

Electroplated Cu is a cost efficient metallization method in microelectronic packaging applications. Typically in 3-D chip staking technology, utilizing through silicon via (TSV), electroplated Cu metallization is inevitable for the throughput as well as reducing the cost of ownership (COO).To achieve a comparable film quality to sputtering or CVD, a pre-cleaning process as well as plating process is crucial. In this research, atmospheric plasma is employed to reduce the usage of chemicals, such as trichloroethylene (TCE) and sodium hydroxide (NaHO), by substituting the chemical assisted organic cleaning process with plasma surface treatment for Cu electroplating. By employing atmospheric plasma treatment, marginally acceptable electroplating and cleaning results are achieved without the use of hazardous chemicals. The experimental results show that the substitution of the chemical process with plasma treatment is plausible from an environmentally friendly aspect. In addition, plasma treatment on immersion Sn/Cu was also performed to find out the solderability of plasma treated Sn/Cu for practical industrial applications.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.183-183
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• 2012

In the era of 45 nm or beyond technology, conventional etch mask using photoresist showed its limitation of etch mask pattern collapse as well as pattern erosion, thus hard mask in etching became necessary for precise control of etch pattern geometry. Currently available hard mask materials are amorphous carbon and polymetric materials spin-on containing carbon or silicon. Amorphous carbon layer (ACL) deposited by PECVD for etch hard mask has appeared in manufacturing, but spin-on carbon (SOC) was also suggested to alleviate concerns of particle, throughput, and cost of ownership (COO) [1]. SOC provides some benefits of reduced process steps, but it also faced with wiggling on a sidewall profile. Diamond like carbon (DLC) was also evaluated for substituting ACL, but etching selectivity of ACL was better than DLC although DLC has superior optical property [2]. Developing a novel material for pattern hard mask is very important in material research, but it is also worthwhile eliminating a potential issue to continuously develop currently existing technology. In this paper, we investigated in-situ dry-cleaning (ISD) monitoring of ACL coated process chamber. End time detection of chamber cleaning not only provides a confidence that the process chamber is being cleaned, but also contributes to minimize wait time waste (WOW). Employing Challenger 300ST, a 300mm ACL PECVD manufactured by TES, a series of experimental chamber cleaning runs was performed after several deposition processes in the deposited film thickness of $2000{\AA}$ and $5000{\AA}$. Ar Actinometry and principle component analysis (PCA) were applied to derive integrated and intuitive trace signal, and the result showed that previously operated cleaning run time can be reduced by more than 20% by employing real-time monitoring in ISD process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04b
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• pp.39-42
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• 2000

As gate dimensions continue to shrink below $0.2{\mu}m$, improving CD (Critical Dimension) control has become a major challenge during CMOS process development. Anti-Reflective Coatings are widely used to overcome high substrate reflectivity at Deep UV wavelengths by canceling out these reflections. In this study, we have investigated Batchtype system for PECVO SiOxNy as Anti-Reflective Coatings. The Singletype system was baseline and Batchtype system was new process. The test structure of Singletype is SiON $250{\AA}$ + Cap Oxide $50{\AA}$ and Batchtype is SiON $250{\AA}$ + Cap Oxide $50{\AA}$ or N2O plasma treatment. Inorganic chemical vapor deposition SiOxNy layer has been qualified for bottom ARC on Poly+WSix layer, But, this test was practiced on the actual device structure of TiN/Al-Cu/TiN/Ti stacks. A former day, in Batchtype chamber thin oxide thickness control was difficult. In this test, Batchtype system is consist of six deposition station, and demanded 6th station plasma treatment kits for N2O treatment or Cap Oxide after SiON $250{\AA}$. Good reflectivity can be obtained by Cap Oxide rather than N2O plasma treatment and both system of PECVD SiOxNy ARC have good electrical properties.