• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.06a
• /
• pp.573-574
• /
• 2006

The planarization technology of Chemical-mechanical polishing(CMP), used for the manufacturing of multi-layer various material interconnects for Large-scale Integrated Circuits (LSI), is also readily adaptable as an enabling technology in MicroElectroMechanical System (MEMS) fabrication, particularly polysilicon surface micromachining. However, general LSI device CMP has partly distinction aspects, the pattern scale and material sorts in comparison with MEMS CMP. This study performed preliminary CMP tests to identify slurry characteristic used in general IC device. The experiment result is possible to verify slurry characteristic in MEMS structure material.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.11b
• /
• pp.181-184
• /
• 2001

Chemical Mechanical Polishing(CMP) of Shallow Trench Isolation(STD structure in 0.18 m semiconductor device fabrication is studied. CMP process is applied for the STI structure with and without reverse moat pattern and End Point Detection (EPD) method is tested. To optimize the transistor properties related metal 1 parameters. we studied the correlation between CMP thickness of STI using high selectivity slurry. DOE of gate etch recipe, and 1st metal DC values. Remaining thickness of STI CMP is proportional to the thickness of gate-etch process and this can affect to gate profile. As CMP thickness increased. the N-poly foot is deteriorated. and the P-Poly Noth is getting better. If CD (Critical Dimension) value is fixed at some point,, all IDSN/P values are in inverse proportional to CMP thickness by reason of so called Profile Effect. Weve found out this phenomenon in all around DOE conditions of Gate etch process and we also could understand that it would not have any correlation effects between VT and CMP thickness in the range of POE 120 sec conditions. As CMP thickness increased by $100\AA$. 3.2 $u\AA$ of IDSN is getting better in base 1 condition. In POE 50% condition. 1.7 $u\AA$ is improved. and 0.7 $u\AA$ is improved in step 2 condition. Wed like to set the control target of CD (critical dimension) in gate etch process which can affect Idsat, VT property versus STI topology decided by CMP thickness. We also would like to decide optimized thickness target of STI CMP throughout property comparison between conventional STI CMP with reverse moat process and newly introduced STI CMP using high selectivity slurry. And we studied the process conditions to reduce Gate Profile Skew of which source known as STI topology by evaluation of gate etch recipe versus STI CMP thickness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.11a
• /
• pp.181-184
• /
• 2001

Chemical Mechanical Polishing(CMP) of Shallow Trench Isolation(STI) structure in 0.18 m semiconductor device fabrication is studied. CMP process is applied for the STI structure with and without reverse moat pattern and End Point Detection (EPD) method is tested. To optimize the transistor properties related metal 1 parameters, we studied the correlation between CMP thickness of STI using high selectivity slurry, DOE of gate etch recipe, and 1st metal DC values. Remaining thickness of STI CMP is proportional to the thickness of gate-etch process and this can affect to gate profile. As CMP thickness increased, the N-poly foot is deteriorated, and the P-Poly Noth is getting better. If CD (Critical Dimension) value is fixed at some point, all IDSN/P values are in inverse proportional to CMP thickness by reason of so called Profile Effect. Weve found out this phenomenon in all around DOE conditions of Gate etch process and we also could understand that it would not have any correlation effects between VT and CMP thickness in the range of POE 120 sec conditions. As CMP thickness increased by 100 ${\AA}$, 3.2 u${\AA}$ of IDSN is getting better in base 1 condition. In POE 50% condition, 1.7 u${\AA}$ is improved, and 0.7 u${\AA}$ is improved in step 2 condition. Wed like to set the control target of CD (critical dimension) in gate etch process which can affect Idsat, VT property versus STI topology decided by CMP thickness. We also would like to decide optimized thickness target of STI CMP throughout property comparison between conventional STI CMP with reverse moat process and newly introduced STI CMP using high selectivity slurry. And we studied the process conditions to reduce Gate Profile Skew of which source known as STI topology by evaluation of gate etch recipe versus STI CMP thickness.

• Tribology and Lubricants
• /
• v.35 no.6
• /
• pp.323-329
• /
• 2019

Sapphire is currently used as a substrate material for blue light-emitting diodes (LEDs). The market for sapphire substrates has expanded rapidly as the use of LEDs has extended into various industries. However, sapphire is classified as one of the most difficult materials to machine due to its hardness and brittleness. Recently, a lap-grinding process has been developed to combine the lapping and diamond mechanical polishing (DMP) steps in a single process. This paper studies, the effect of wafer surface roughness on the chemical mechanical polishing (CMP) process by pressure and abrasive concentration in the lap-grinding process of a sapphire wafer. In this experiment, the surface roughness of a sapphire wafer is measured after lap-grinding by varying the pressure and abrasive concentration of the slurry. CMP is carried out under pressure conditions of 4.27 psi, a plate rotation speed of 103 rpm, head rotation speed of 97 rpm, and slurry flow rate of 170 ml/min. The abrasive concentration of the CMP slurry was 20wt, implying that the higher the surface roughness after lapgrinding, the higher the material removal rate (MRR) in the CMP. This is likely due to the real contact area and actual contact pressure between the rough wafer and polishing pad during the CMP. In addition, wafers with low surface roughness after lap-grinding show lower surface roughness values in CMP processes than wafers with high surface roughness values; therefore, further research is needed to obtain sufficient surface roughness before performing CMP processes.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.117-117
• /
• 2008

In MIM capacitor, poly-Si bottom electrode is replaced with metal bottom electrode. Noble metals can be used as bottom electrodes of capacitors because they have high work function and remain conductive in highly oxidizing conditions. In addition, they are chemically very stable. Among novel metals, Ru (ruthenium) has been suggested as an alternative bottom electrode due to its excellent electrical performance, including a low leakage of current and compatibility to high dielectric constant materials. Chemical mechanical planarization (CMP) process has been suggested to planarize and isolate the bottom electrode. Even though there is a great need for development of Ru CMP slurry, few studies have been carried out due to noble properties of Ru against chemicals. In the organic chemistry literature, periodate ion ($IO_4^-$) is a well-known oxidant. It has been reported that sodium periodate ($NaIO_4$) can form $RuO_4$ from hydrated ruthenic oxide ($RuO_2{\cdot}nH_2O$). $NaIO_4$ exist as various species in an aqueous solution as a function of pH. Also, the removal mechanism of Ru depends on solution of pH. In this research, the static etch rate, passivation film thickness and wettability were measured as a function of slurry pH. The electrochemical analysis was investigated as a function of pH. To evaluate the effect of pH on polishing behavior, removal rate was investigated as a function of pH by using patterned and unpatterned wafers.

• Particle and aerosol research
• /
• v.9 no.4
• /
• pp.261-269
• /
• 2013

The chemical mechanical polishing (CMP) process is widely used in semiconductor manufacturing process for planarization of various materials and structures. Point-of-use (POU) filters are used in most of the CMP processes in order to reduce the unwanted micro-scratches which may result in defects. The performance of the POU filter is depends on type and size of the abrasives used during cleaning process. For this reason, there is a need to evaluate POU filters for their filtration efficiency (FE) with different types of abrasives. In this study, we developed filter test system to evaluate the FE of POU using ceria and silica abrasives (slurry). The POU filter is roll type capsule filter with retention size of 0.2 ${\mu}m$. Two POU filters of different make are evaluated for FE. We observed that both POU filters show similar filtration efficiency for silica and ceria slurry. Results reveal that the ceria slurry and the colloidal silica particle are removed not only by mechanical way but also hydrodynamic and electrostatic interaction way.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.04b
• /
• pp.38-41
• /
• 2004

The oxidizer plays an important role in the metal chemical mechanical polishing(CMP) slurry. Currently, the oxidizer used in CMP slurry is nearly divided into several kinds such as $Fe(NO_3)_3$, $H_2O_2$, $KIO_3$, and $H_5IO_6$. It is generally known that oxidizer character of $H_2O_2$ is more effective than other oxidizers. In this work, we have been studied the characteristics for the $H_2O_2$ concentration of copper slurry, which can applicable in the recent semiconductor manufacturing process. Also, it plays an important role in the planarization of copper films using copper slurries during micro-electronic device fabrication. In this work, we confirmed that removal rate of Cu/TaN changed by $H_2O_2$ concentration on copper slurry. And we used $KMnO_4$ in the measurement method of $H_2O_2$. In analysis results, we confirmed that the difference of results is large. We thought that the difference was due to organic component existence. So in titration method of $H_2O_2$ concentration, we used $Na_2S_2O_3$ instead of $KMnO_4$ as solution. Consequently, using the titration method, we could calculate correct data reduced error. And $H_2O_2$ concentration has been adjusted to the target concentration of 0.1 wt%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.05c
• /
• pp.166-169
• /
• 2003

In this study, we evaluated the characteristics by the addition of 3 different kinds of nonionic surfactant to improve the dispersion stability of slurries. Slurry stability is an issue in any industry in which settling of particles can result in poor performance. So we observed the variation of particle size and settling rate when the concentration and addition time of surfactant are changed. When the surfactant is added after milling process, the particle size and pH became low. It is supposed that the particle agglomeration was disturbed by adsorption of surfactant on alumina abrasive. The settling rate was relatively stable when nonionic surfactant is added about 0.1~1.0 wt%. When molecular weight(MW) is too small like Brij 35, it was appeared low effect on dispersion stability. Because it can't prevent coagulation and subsequent settling with too small MW. The proper quality of MW for slurry stability was presented about 500,000. Consequently, the addition of nonionic surfactant to alumina slurry has been shown to have very good effect on slurry stabilization. If we apply this results to copper CMP process, it is thought that we will be able to obtain better yield.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.161-161
• /
• 2008

The oxide film of silicon wafer has been mainly polished by fumed silica, colloidal silica or ceria slurry. Because colloidal silica slurry is uniform and highly dispersed composed of spherical shape particles, by which the oxide film polished remains to be less scratched in finishing polishing process. Even though the uniformity and spherical shape is advantage for reducing the scratch, it may also be the factor to decrease the removal rate. We have studied the correlation of silica abrasive particles and CMP characteristics by varying pH, down force, and table rotation rate in polishing. It was found that the CMP polishing is dependent on the morphology, aggregation, and the surface property of the silica particles.

• Proceedings of the KSME Conference
• /
• 2003.11a
• /
• pp.922-927
• /
• 2003

In this paper, slurry fluid motion, abrasive particle motion, and roles of groove patterns on the pads are numerically investigated in the 2D and 3D geometries. The simulation results are analyzed in terms of experimental removal rate and WIWNU (within wafer non-uniformity) for ILD (inter level dielectric) CMP process. Numerical investigations reveal that the grooves in the pad behave as uniform distributor of abrasive particles and enhance the removal rate by increasing shear stress. Higher removal rate and desirable uniformity are numerically and experimentally observed at the pad with grooves. Numerical analysis is very well matched with experimental results and helpful for understanding polishing mechanism and local physics.