• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.755-758
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• 2005

This paper describes the novel immunoassay sensing system for a portable clinical diagnosis system. It consists of a bead cage reactor and a CMOS integrated biosensor. It showed the simple and easy antibody coating method on beads by flow-through avidin biotin complex technology in a microfluidic device. It showed just 90 nL sample consumption and good result for the application of alpha feto protein. The bead cage reactor has the role of the antibody coating, antigen binding and enzyme linking for the electrochemical sensing method. The CMOS biosensor consists of ISFET (ion selective field effect transistor) biosensor and temperature sensor for detecting pH that is the byproduct of enzyme reaction. The sensitivity is 8 $kHz/^{\circ}C$ in a temperature sensor and 33 mV/pH in a pH sensor. After filling the 15 um polystyrene beads in bead cage, antibody flowed and reacted to beads. Subsequently, the biotinylated antigen flowed and bound to the antibody and GOD (glucose oxidase)-avidin conjugate flowed and reacted to the biotin of the biotinylated antigen. After this reaction process, glucose solution flowed and reacted to the GOD on beads. The hydrogen was generated by glucose-GOD reaction. And it was detected by the pH sensor.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.52-59
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• 2010

This paper proposes a high-resolution and high-frame rate CMOS image sensor with column-wise cyclic ADC. The proposed ADC uses the sharing techniques of OTAs and capacitors for low-power consumption and small silicon area. The proposed ADC was verified implementing the prototype chip as QVGA image sensor. The measured maximum frame rate is 120 fps, and the power consumption is 130 mW. The power supply is 3.3 V, and the die size is $4.8\;mm\;{\times}\;3.5\;mm$. The prototype chip was fabricated in a 2-poly 3-metal $0.35-{\mu}m$ CMOS process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.396-399
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• 2003

In this paper, the purpose is to develop imaging technique of synchrotron radiation using CMOS image sensor. The detector using hybrid method to be research in this lab was used, in order to increase image signal. We made experiments with 1B2 Whitebeam/microprobe beamline in PAL (Pohang Accelerator Laboratory). Phosphor materials such as ZnS:(Ag,Li), ZnS:(Cu,Al), $Y_2O_2S:Eu$ were produced by spin coating on glass. Synchrotron radiation images were acquired and evaluated from monochromatic light from monochromoator in PAL 1B2line. From obtained object and phantom, MTF was 0.15 in ZnS:(Ag,Li) phosphor, and 0.178 in ZnS:( Cu,Al) at 151p/mm. MTFs were unsystematic because thickness of phosphor and uniformity of surface were not optimized. It's expected to improve MTF and the qualify of images as uniformity's optimized.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.2
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• pp.239-247
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• 2007

In this paper, we propose a system that the Linux is ported in embedded system with peripheral devices of CIS(CMOS Image Sensor) and GPS module. The system acquires GGA sentence from GPS module by recognizing camera and GPS is used module in Linux kernel. And then the received location information is used to include still image acquired through CIS According to this paper, We compose hardware for embedded system, attach board (including camera), port Linux BootLoader and Kernel. And. then we realize that it insert kernel in CIS control device driver and GPS module device driver.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.2
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• pp.322-329
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• 2007

A single pixel photon counting type image sensor which is applicable for medical diagnosis with digitally obtained image and industrial purpose has been designed with $0.18{\mu}m$ triple-well CMOS process. The designed single pixel for readout chip is able to be operated by single supply voltage to simplify digital X-ray image sensor module and a preamplifier which is consist of folded cascode CMOS operational amplifier has been designed to enlarge signal voltage(${\Delta}Vs$), the output voltage of preamplifier. And an externally tunable threshold voltage generator circuit which generates threshold voltage in the readout chip has been newly proposed against the conventional external threshold voltage supply. In addition, A dark current compensation circuit for reducing dark current noise from photo diode is proposed and 15bit LFSR(Linear Feedback Shift Resister) Counter which is able to have high counting frequency and small layout area is designed.

• Journal of IKEEE
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• v.23 no.2
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• pp.681-686
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• 2019

This paper proposes a CMOS temperature sensor using inverter delay chains of the same size based on the pulse shrinking method. A temperature-pulse converter (TPC) uses two different temperature delay lines with inverter chains to generate a pulse in proportion to temperature, and a time-digital converter (TDC) shrinks the pulse using inverter chains of the same size to convert pulse width into a digital value to be insensitive to process changes. The chip was implemented with a $0.49{\mu}m{\times}0.23{\mu}m$ area using a $0.35{\mu}m$ CMOS process with a supply voltage of 3.3V. The measurement results show a resolution of $0.24^{\circ}C/bit$ for 9-bit data for a temperature sensor range of $0^{\circ}C$ to $100^{\circ}C$.

• Proceedings of the KIEE Conference
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• 2005.07d
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• pp.2664-2666
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• 2005

In this paper, we develop the on board type image processing system using the CMOS sensor and the RISC type main processor. The main processor transmits YUV 4:2:2 type raw data captured by a CMOS image sensor to another processor(such as motion controller, PC, etc) via serial communication (rs232, SPI, I2C, etc). The role of another processor is line and obstacle detecting in image data received from the image processing board developed in this paper.

• Journal of Information Processing Systems
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• v.7 no.1
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• pp.93-102
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• 2011

In deeply scaled CMOS technologies, two major non-ideal factors are threatening the survival of the CMOS; i) PVT (process, voltage, and temperature) variations and ii) leakage power consumption. In this paper, we propose a novel post-silicon tuning methodology to scale optimum voltage and frequency "dynamically". The proposed design technique will use our PVT sensor circuits to monitor the variations and based on the monitored variation data, voltage and frequency will be compensated "automatically". During the compensation process, supply voltage is dynamically adjusted to guarantee the minimum total power consumption without violating the frequency requirement. The simulation results show that the proposed technique can reduce the total power by 85% and the static power by 53% on average for the selected ISCAS'85 benchmark circuits with 45 nm CMOS technology compared to the results of the traditional PVT compensation method.

• Journal of Sensor Science and Technology
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• v.18 no.3
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• pp.190-196
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• 2009

In a conventional camera system, a target tracking system consists of a camera part and a image processing part. However, in the field of the real time image processing, the vision chip for edge detection which was made by imitating the algorithm of humanis retina is superior to the conventional digital image processing systems because the human retina uses the parallel information processing method. In this paper, we present a high speed target tracking system using the function of the CMOS vision chip for edge detection.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.653-656
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• 2003

We have designed embedded web sewer system and ported Linux operating system version 2.4.5 at our system. And then We implemented to control and monitor widely separated hardware and implemented to monitor widely separated image using CMOS image sensor HV7131B. Web server is the Boa web server with General Public License. We designed for this system using of Intel's SA1110 ARM core base processor and connecting input and output device at GPIO port of SA1110. Device driver of General purpose I/O for Embedded Linux OS is designed. And then the application program controlling driver is implemented to use of common gate interface C language. User is available to control and monitor at client PC. This method have benefit to reduce the Expenditure of hardware design and development time against PC base system and have various and capacious application against firmware base system.