• Journal of the Korean Society for Precision Engineering
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• v.17 no.11
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• pp.25-35
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• 2000

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2011.06a
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• pp.749-750
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• 2011

• Biotechnology and Bioprocess Engineering:BBE
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• v.9 no.2
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• pp.100-106
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• 2004

Micro-fluidics is one of the major technologies used in developing micro-total analytical systems (${\mu}$-TAS), also known as “lab-on-a-chip”. With this technology, the analytical capabilities of room-size laboratories can be put on one small chip. In this paper, we will briefly introduce materials that can be used in micro-fluidic systems and a few modules (mixer, chamber, and sample prep. modules) for lab-on-a-chip to analyze biological samples. This is because a variety of fields have to be combined with micro-fluidic technologies in order to realize lab-on-a-chip.

• ETRI Journal
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• v.27 no.5
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• pp.563-568
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• 2005

A motion-control chip contains major functions that are necessary to control the position of each motor, such as generating velocity command profiles, reading motor positions, producing control signals, driving several types of servo amplifiers, and interfacing host processors. Existing motion-control chips can only generate velocity profiles of fixed characteristics, typically linear and s-shape smooth symmetric curves. But velocity profiles of these two characteristics are not optimal for all tasks in industrial robots and automation systems. Velocity profiles of other characteristics are preferred for some tasks. This paper proposes a motion-control chip to generate velocity profiles of desired acceleration and deceleration characteristics. The proposed motion-control chip is implemented with a field-programmable gate array by using the Very High-Speed Integrated Circuit Hardware Description Language and Handel-C. Experiments using velocity profiles of four different characteristics will be performed.

• Proceedings of the Korean Information Science Society Conference
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• 2005.11a
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• pp.523-525
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• 2005

인공위성 탑재컴퓨터의 내부 인터페이스를 위하여 SpaceWire 표준을 적용한 SMCS Chip Set의 사용이 고려되고 있다. SpaceWire는 IEEE-1355 프로토콜을 적용한 것으로 위성체 내에서 다양한 모듈들 간에 손쉬운 표준 인터페이스를 제공한다. 또한 다수의 모듈간의 상호 교차 연결을 위한 Cross-Strap 인터페이스 구현이 간단하게 구현될 수 있으므로 위성 운용 기간 중의 높은 신뢰도를 보장할 수 있다. 본 논문에서는 SpaceWire 표준을 적용한 SMCS Chip Set에 대한 소개와 SMCS Chip Set 통한 데이터 전송에 필요한 소프트웨어 제어절차에 대해서 기술하였다.

• Journal of Korea Multimedia Society
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• v.19 no.2
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• pp.352-359
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• 2016

This paper presents high efficiency 5A synchronous DC-DC buck converter. The proposed DC-DC buck converter works from 4.5V to 18V input voltage range, and provides up to 5A of continuous output current and output voltage adjustable down to 0.8V. This chip is packaged MCP(multi-chip package) with control chip, top side P-CH switch, and bottom side N-CH switch. This chip is designed in a 25V high voltage CMOS 0.35um technology. It has a maximum power efficiency of up to 94% and internal 3msec soft start and fixed 500KHz PWM(Pulse Width Modulation) operations. It also includes cycle by cycle current limit function, short and thermal shutdown protection circuit at 150℃. This chip size is 2190um*1130um includes scribe lane 10um.

• ETRI Journal
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• v.27 no.1
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• pp.81-88
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• 2005

In this paper, interface circuits that are suitable for point-to-point interconnection with an over 1 Gbps data rate per pin are proposed. To achieve a successful data transfer rate of multi-gigabits per-second between two chips with a point-to-point interconnection, the input receiver uses an on-chip parallel terminator of the pass gate style, while the output driver uses the pullup and pulldown transistors of the diode-connected style. In addition, the novel dynamic voltage level converter (DVLC) has solved such problems as the access time increase and valid data window reduction. These schemes were adopted on a 64 Mb DDR SRAM with a 1.5 Gbps data rate per pin and fabricated using a 0.10 ${\mu}m$ dual gate oxide CMOS technology.

• Proceedings of the KSME Conference
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• 2001.06d
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• pp.546-552
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• 2001

The heat transfer and flow measurements on a pedestal encountered in chip cooling. A uniform wall temperature boundary condition at the plate surface and on a pedestal was created using shroud method. Liquid crystal was used to measure the plate surface temperature. The jet Reynolds number (Re) ranges from 11,000 to 50,000, the dimensionless nozzle-to-surface distance (L/d) from 2 to 10, and the dimensionless pedestal diameter-to-height (H/D) from 0 to 1.0. The results show that the Nusselt number distributions at the near the pedestal exhibit secondary maxima at $r/d{\cong}1.0\;and\;1.5$. The formation of the secondary maxima is attributed to an create in the vortex by the pedestal.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.12
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• pp.46-52
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• 1991

A new signal process circuit using two ISFETs as the input devices of the MOS differential amplifier stage for an ISFET biosensor has been developed. One chip integration of the newly developed signal process circuit, ISFETs and a Pt quasi-reference electrode has been carried out according to modified LOCOS p-well CMOS process. The fabricated chip showed gains of 0.8 and 1.6, good liniarity in the input-output relationship and very small power dissipation, 4mW. The chip was applied to realize a urea sensor by forming an immobilized urease membrane, using lift-off technique. on the gate of an ISFET. The urea sensor chip showed stable responses in a wide range of urea concentrations.

• ETRI Journal
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• v.30 no.6
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• pp.783-789
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• 2008

A bio-inspired vision chip for edge detection was fabricated using 0.35 ${\mu}m$ double-poly four-metal complementary metal-oxide-semiconductor technology. It mimics the edge detection mechanism of a biological retina. This type of vision chip offer several advantages including compact size, high speed, and dense system integration. Low resolution and relatively high power consumption are common limitations of these chips because of their complex circuit structure. We have tried to overcome these problems by rearranging and simplifying their circuits. A vision chip of $160{\times}120$ pixels has been fabricated in $5{\times}5\;mm^2$ silicon die. It shows less than 10 mW of power consumption.