• Title/Summary/Keyword: CHIP

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Flip-chip Bonding Using Nd:YAG Laser (Nd:YAG 레이저를 이용한 Flipchip 접합)

  • Song, Chun-Sam;Ji, Hyun-Sik;Kim, Jong-Hyeong;Kim, Joo-Hyun;Kim, Joo-Han
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.17 no.1
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    • pp.120-125
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    • 2008
  • A flip-chip bonding system using DPSS(Diode Pumped Solid State) Nd:YAG laser(wavelength : 1064nm) which shows a good quality in fine pitch bonding is developed. This laser bonder can transfer beam energy to the solder directly and melt it without any physical contact by scanning a bare chip. By using a laser source to heat up the solder balls directly, it can reduce heat loss and any defects such as bridge with adjacent solder, overheating problems, and chip breakage. Comparing to conventional flip-chip bonders, the bonding time can be shortened drastically. This laser precision micro bonder can be applied to flip-chip bonding with many advantage in comparison with conventional ones.

Two-dimensional Chip-load Analysis for Automatic Feedrate Adjustment (이송률 자동조정을 위한 2차원 칩로드 해석)

  • 배석형;고기훈;최병규
    • Korean Journal of Computational Design and Engineering
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    • v.5 no.2
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    • pp.155-167
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    • 2000
  • To be presented is two-dimensional chip-load analysis for cutting-load smoothing which is needed in unmanned machining and high speed machining of sculptured surfaces. Cutter-engagement angle and effective cutting depth are defined as chip-loads which are the geometrical measures corresponding to cutting-load while machining. The extreme values of chip-loads are geometrically derived in the line-line and line-arc-line blocks of the two-dimensional NC-codes. AFA(automatic feedrate adjustment) strategy for cutting-load smoothing is presented based on the chip-load trajectories.

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Design and Implementation of High Speed Pulse Motor Controller Chip (고속 펄스 모터 콘트롤러 칩의 설계 및 구현)

  • 김원호;이건오;원종백;박종식
    • Journal of Institute of Control, Robotics and Systems
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    • v.5 no.7
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    • pp.848-854
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    • 1999
  • In this paper, we designed and implemented a precise pulse motor controller chip that generates the pulse needed to control step motor, DC servo and AC servo motors. This chip generates maximum pulse output rate of 5Mpps and has the quasi-S driving capability and speed and moving distance override capability during driving. We designed this chip with VHDL and executed a logic simulation and synthesis using Synopsys tool. The pre-layout simulation and post-layout simulation was executed by Compass tool. This chip was produced with 100 pins, PQFP package by 0.8${\mu}{\textrm}{m}$ gate array process and implemented by completely digital logic. We developed the test hardware board of performance and the CAMC(Computer Aided Motor Controller) Agent softwate to test the performance of the pulse motor controller chip produced. CAMC Agent enables user to set parameters needed to control motor with easy GUI(Graphic User Interface) environment and to display the output response of motor graphically.

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A Dynamic Programming Approach to Feeder Arrangement Optimization for Multihead-Gantry Chip Mounter (동적계획법에 의한 멀티헤드 겐트리형 칩마운터의 피더배치 최적화)

  • 박태형
    • Journal of Institute of Control, Robotics and Systems
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    • v.8 no.6
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    • pp.514-523
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    • 2002
  • Feeder arrangement is an important element of process planning for printed circuit board assembly systems. This paper newly proposes a feeder arrangement method for multihead-gantry chip mounters. The multihead-gantry chip mounters are very popular in printed circuit board assembly system, but the research has been mainly focused on single-head-gantry chip mounters. We present an integer programming formulation for optimization problem of multihead-gantry chip mounters, and propose a heuristic method to solve the large NP-complete problem in reasonable time. Dynamic programming method is then applied to feeder arrangement optimization to reduce the overall assembly time. Comparative simulation results are finally presented to verify the usefulness of the proposed method.

Light-Adaptive Vision System for Remote Surveillance Using an Edge Detection Vision Chip

  • Choi, Kyung-Hwa;Jo, Sung-Hyun;Seo, Sang-Ho;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.20 no.3
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    • pp.162-167
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    • 2011
  • In this paper, we propose a vision system using a field programmable gate array(FPGA) and a smart vision chip. The output of the vision chip is varied by illumination conditions. This chip is suitable as a surveillance system in a dynamic environment. However, because the output swing of a smart vision chip is too small to definitely confirm the warning signal with the FPGA, a modification was needed for a reliable signal. The proposed system is based on a transmission control protocol/internet protocol(TCP/IP) that enables monitoring from a remote place. The warning signal indicates that some objects are too near.

A Study of Bending Stress for the 3-D Chip Curl (3-D 칩 만곡의 굽힘응력에 관한 연구)

  • 윤주식;김우순;김경우;김동현
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2000.05a
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    • pp.730-734
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    • 2000
  • Once the Chip has developed a mixed mode of side-curl and up-curl, it would generally curl to strike the too] flank. The development of the bending stresses and shear in the chip would ultimately lead to chip failure. This paper attacks this problem from a mechanics-based approach. by treating the chip as a 3-D elastic curved beam, and applying appropriate constraints and forces. The expressions for bending. shear and direct stresses are developed through an energy-based criterion. The location of the maximum stresses is also identified and explained for simulated test conditions.

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Effect of Plasma Treatment on the Bond Strength of Sn-Pb Eutectic Solder Flip Chip (Sn-Pb 공정솔더 플립칩의 접합강도에 미치는 플라즈마 처리 효과)

  • 홍순민;강춘식;정재필
    • Journal of Welding and Joining
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    • v.20 no.4
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    • pp.498-504
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    • 2002
  • Fluxless flip chip bonding process using plasma treatment instead of flux was investigated. The effect of plasma process parameters on tin-oxide etching characteristics were estimated with Auger depth profile analysis. The die shear test was performed to evaluate the adhesion strength of the flip chip bonded after plasma treatment. The thickness of oxide layer on tin surface was reduced after Ar+H2 plasma treatment. The addition of H2 improved the oxide etching characteristics by plasma. The die shear strength of the plasma-treated Sn-Pb solder flip chip was higher than that of non-treated one but lower than that of fluxed one. The difference of the strength between plasma-treated specimen and non-treated one increased with increase in bonding temperature. The plasma-treated flip chip fractured at solder/TSM interface at low bonding temperature while the fracture occurred at solder/UBM interface at higher bonding temperature.

SAPS의 탄소원 공급을 위한 유기물 연구

  • 이지은;고주인;김선준;유상희
    • Proceedings of the Korean Society of Soil and Groundwater Environment Conference
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    • 2004.09a
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    • pp.231-234
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    • 2004
  • The experiments on some organic materials used in SAPS are carried out for the better sulfate reduction efficiency and the longer lifetime. Organic materials include spent mushroom compost, sewage sludge, oak chip compost and the combination of there. Reactors with mushroom compost, sewage sludge, the mixture of mushroom compost and sewage sludge, and the mixture of mushroom compost and oak chip compost maintained pH higher than 6.0. Reactors with mushroom compost, the mixture of mushroom compost and sewage sludge, and the mixture of mushroom compost and oak chip compost maintained reduction condition. Reactors with sewage sludge, oak chip compost and the mixture of sewage and oak chip compost produced COD less than 2,000ppm. Reactors with sewage and the mixture of mushroom compost, sewage sludge, oak chip compost showed about 60% of sulfate removal ratios.

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Design and Characteristics of a Chip Antenna for Bluetooth (Bluetooth용 Chip Antenna설계 및 특성 고찰)

  • 고영혁
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.5
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    • pp.47-52
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    • 2004
  • In this paper we fabricated microchip antenna operating in bluetooth frequency bands(2.402∼2.4800㎓). The antenna has a size of about 54mm${\times}$19mm${\times}$0.8mm giving a total bluetooth PCB for suuort and chip of about 11mm${\times}$4mm${\times}$1.6mm. Bandwidth of the designed and fabricated chip antenna for bruetooth is 10.71% at the resonated frequency of 2.45㎓ and the resonant frequency and bandwidth versus change of my arbitrary fled point is observed. also, E-plane and H-plane in the Measured radiation pattern characteristic of chip antenna is compared and analyzed.

Design and Fabrication of the System in Package for the Digital Broadcasting Receiver (디지털 방송 수신용 System in Package 설계 및 제작)

  • Kim, Jee-Gyun;Lee, Heon-Yong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.1
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    • pp.107-112
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    • 2009
  • This paper describes design and fabrication issues of the SiP(System in Package) one-chip for a portable digital broadcasting receiver. It includes RF tuner chip, demodulator chip and passive components for the receiver system. When we apply the SiP one-chip technology to the broadcasting receiver, the system board size can be reduced from $776mm^2$ to $144mm^2$. SiP one-chip has an advantage that the area reduces more 81% than separated chips. Also the sensitivity performance advances -1dBm about 36 channels in the RF weak electric field, the power consumption reduces about 2mW and the C/N keeps on the same level.